component

CD74HC595M96

Public Made by Adom

by adom

Texas Instruments Shifting Register, SOIC-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

componentlogiccd74hc595m96
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pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left)

Ray ·cf9a5cce4d · ·parent b986494
5 files changed +520−3
cd74hc595m96.lbr+1−1package.json+2−1pads.json+505page.json+11viewers/footprint.html+1−1
cd74hc595m96.lbr+1−1
@@ -78,7 +78,7 @@   <wire x1="2.0600" y1="-5.0600" x2="-2.0600" y2="-5.0600" width="0.1200" layer="21"/>   <text x="0" y="6.020" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-6.020" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-</package>+<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="5.0100"/><vertex x="-2.8400" y="5.3400"/><vertex x="-2.3600" y="5.3400"/></polygon></package> </packages> <symbols> <symbol name="CD74HC595M96">
package.json+2−1
@@ -24,6 +24,7 @@     "docs/hero.png",     "docs/cd74hc595m96-datasheet.pdf",     "viewers/symbol.html",-    "viewers/footprint.html"+    "viewers/footprint.html",+    "pads.json"   ] }\ No newline at end of file
pads.jsonadded+505
@@ -0,0 +1,505 @@+{+ "schema": "adom.pads/1",+ "slug": "cd74hc595m96",+ "footprint": "SOIC-16_3.9x9.9mm_P1.27mm",+ "generated_from": {+  "footprint": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",+  "pins": "page.json:component.pins",+  "overrides": null+ },+ "pin1": {+  "pad": "1",+  "at": [+   -2.475,+   -4.445+  ],+  "corner": "top-left",+  "source": "silk-marker",+  "derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c"+ },+ "pad_count": 16,+ "paste_apertures": 0,+ "issues": [],+ "pads": [+  {+   "pad": "1",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    -4.445+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "1",+   "name": "QB",+   "type": "tri_state",+   "description": "3-state parallel output bit B of the 8-bit storage register. Drives up to ±6 mA at VCC = 5 V; high-impedance when OE is high.",+   "is_pin1": true,+   "source": {+    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "2",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    -3.175+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "2",+   "name": "QC",+   "type": "tri_state",+   "description": "3-state parallel output bit C of the 8-bit storage register. Drives up to ±6 mA at VCC = 5 V; high-impedance when OE is high.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "3",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    -1.905+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "3",+   "name": "QD",+   "type": "tri_state",+   "description": "3-state parallel output bit D of the 8-bit storage register. Drives up to ±6 mA at VCC = 5 V; high-impedance when OE is high.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "4",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    -0.635+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "4",+   "name": "QE",+   "type": "tri_state",+   "description": "3-state parallel output bit E of the 8-bit storage register. Drives up to ±6 mA at VCC = 5 V; high-impedance when OE is high.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "5",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    0.635+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "5",+   "name": "QF",+   "type": "tri_state",+   "description": "3-state parallel output bit F of the 8-bit storage register. Drives up to ±6 mA at VCC = 5 V; high-impedance when OE is high.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "6",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    1.905+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "6",+   "name": "QG",+   "type": "tri_state",+   "description": "3-state parallel output bit G of the 8-bit storage register. Drives up to ±6 mA at VCC = 5 V; high-impedance when OE is high.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "7",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    3.175+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "7",+   "name": "QH",+   "type": "tri_state",+   "description": "3-state parallel output bit H (MSB) of the 8-bit storage register. Drives up to ±6 mA at VCC = 5 V; high-impedance when OE is high.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "8",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    -2.475,+    4.445+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "8",+   "name": "GND",+   "type": "power_in",+   "description": "Ground reference (0 V) for the device.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "9",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    4.445+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "9",+   "name": "QH'",+   "type": "output",+   "description": "Serial data output from the last stage of the shift register (not 3-state). Used to cascade multiple CD74HC595 devices by connecting QH' to the SER input of the next stage.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "10",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    3.175+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "10",+   "name": "SRCLR",+   "type": "input",+   "description": "Active-low direct overriding shift-register clear. When held low, the shift register is asynchronously cleared; the storage register is unaffected.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "11",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    1.905+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "11",+   "name": "SRCLK",+   "type": "input",+   "description": "Shift-register clock input. On each positive edge, serial data on SER is shifted into the 8-bit shift register.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "12",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    0.635+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "12",+   "name": "RCLK",+   "type": "input",+   "description": "Storage-register (latch) clock input. On each positive edge, the contents of the shift register are transferred to the 8-bit storage register and appear at QA-QH.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "13",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    -0.635+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "13",+   "name": "OE",+   "type": "input",+   "description": "Active-low output-enable for the QA-QH 3-state outputs. When high, QA-QH are placed in the high-impedance state; when low, storage-register data drives the outputs. Does not affect QH'.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "14",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    -1.905+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "14",+   "name": "SER",+   "type": "input",+   "description": "Serial data input to the first stage of the shift register. Sampled on the positive edge of SRCLK.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "15",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    -3.175+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "15",+   "name": "QA",+   "type": "tri_state",+   "description": "3-state parallel output bit A (LSB) of the 8-bit storage register. Drives up to ±6 mA at VCC = 5 V; high-impedance when OE is high.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  },+  {+   "pad": "16",+   "kind": "smd",+   "shape": "roundrect",+   "at": [+    2.475,+    -4.445+   ],+   "rot": 0.0,+   "size": [+    1.95,+    0.6+   ],+   "layers": [+    "F.Cu",+    "F.Mask",+    "F.Paste"+   ],+   "thermal": false,+   "pin": "16",+   "name": "VCC",+   "type": "power_in",+   "description": "Positive supply voltage input. Recommended operating range 2 V to 6 V (5 V nominal); absolute maximum 7 V.",+   "is_pin1": false,+   "source": {+    "geometry": "SOIC-16_3.9x9.9mm_P1.27mm.kicad_mod",+    "meaning": "page.json:component.pins",+    "correspondence": "kicad: symbol pin number == pad name"+   }+  }+ ]+}\ No newline at end of file
page.json+11
@@ -144,6 +144,17 @@     "viewers": {       "symbol": "viewers/symbol.html",       "footprint": "viewers/footprint.html"+    },+    "pin1": {+      "pad": "1",+      "at": [+        -2.475,+        -4.445+      ],+      "corner": "top-left",+      "source": "silk-marker",+      "derived_from": "SOIC-16_3.9x9.9mm_P1.27mm@sha256:f9b5075740f7816c",+      "mark": "drawn"     }   },   "metadata": {
viewers/footprint.html+1−1
@@ -23,7 +23,7 @@ rect.pad.hi{stroke:var(--hi);stroke-width:.15;paint-order:stroke} #tip .td{font-size:11px;color:var(--ink);margin-top:5px;line-height:1.4} </style></head><body> <div class=bar><span class=h>PCB footprint</span><span class=sp></span><button class="lyrtog on" data-lyr="copper"><span class="d" style="background:#e35d5d"></span>Copper</button><button class="lyrtog on" data-lyr="silk"><span class="d" style="background:#e6edf3"></span>Silkscreen</button><button class="lyrtog" data-lyr="fab"><span class="d" style="background:#8b949e"></span>Fab</button><button class="lyrtog" data-lyr="courtyard"><span class="d" style="background:#bc8cff"></span>Courtyard</button></div>-<div class=stage id=stage><svg xmlns='http://www.w3.org/2000/svg' viewBox='-4.100 -5.600 8.200 11.200' style='width:100%;height:100%'><line class='ly-silk' x1='-2.060' y1='-5.060' x2='2.060' y2='-5.060' stroke='#d8b4fe' stroke-width='0.120'/><line class='ly-silk' x1='-2.060' y1='-5.005' x2='-2.060' y2='-5.060' stroke='#d8b4fe' stroke-width='0.120'/><line class='ly-silk' x1='-2.060' y1='5.060' x2='-2.060' y2='5.005' stroke='#d8b4fe' stroke-width='0.120'/><line class='ly-silk' x1='2.060' y1='-5.060' x2='2.060' y2='-5.005' stroke='#d8b4fe' stroke-width='0.120'/><line class='ly-silk' x1='2.060' y1='5.005' x2='2.060' y2='5.060' stroke='#d8b4fe' stroke-width='0.120'/><line class='ly-silk' x1='2.060' y1='5.060' x2='-2.060' y2='5.060' stroke='#d8b4fe' stroke-width='0.120'/><line class='ly-courtyard' x1='-3.700' y1='-5.000' x2='-2.200' y2='-5.000' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='-3.700' y1='5.000' x2='-3.700' y2='-5.000' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='-2.200' y1='-5.200' x2='2.200' y2='-5.200' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='-2.200' y1='-5.000' x2='-2.200' y2='-5.200' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='-2.200' y1='5.000' x2='-3.700' y2='5.000' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='-2.200' y1='5.200' x2='-2.200' y2='5.000' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='2.200' y1='-5.200' x2='2.200' y2='-5.000' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='2.200' y1='-5.000' x2='3.700' y2='-5.000' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='2.200' y1='5.000' x2='2.200' y2='5.200' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='2.200' y1='5.200' x2='-2.200' y2='5.200' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='3.700' y1='-5.000' x2='3.700' y2='5.000' stroke='#4ade80' stroke-width='0.050'/><line class='ly-courtyard' x1='3.700' y1='5.000' x2='2.200' y2='5.000' stroke='#4ade80' stroke-width='0.050'/><rect class='ly-copper pad' data-num='1' data-name='QB' x='-3.450' y='-4.745' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='-2.475' y='-4.445' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>1</text><rect class='ly-copper pad' data-num='2' data-name='QC' x='-3.450' y='-3.475' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='-2.475' y='-3.175' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>2</text><rect class='ly-copper pad' data-num='3' data-name='QD' x='-3.450' y='-2.205' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='-2.475' y='-1.905' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>3</text><rect class='ly-copper pad' data-num='4' data-name='QE' x='-3.450' y='-0.935' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='-2.475' y='-0.635' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>4</text><rect class='ly-copper pad' data-num='5' data-name='QF' x='-3.450' y='0.335' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' opacity='0.94'/><text class='padnum' x='-2.475' y='0.635' font-size='0.360' fill='#1c1206' text-anchor='middle' dominant-baseline='central' pointer-events='none' font-family='ui-monospace,monospace' font-weight='700'>5</text><rect class='ly-copper pad' data-num='6' data-name='QG' x='-3.450' y='1.605' width='1.950' height='0.600' rx='0.150' fill='#f59e0b' stroke='#00000033' stroke-width='0.03' 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