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CD74HC194PWT
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Texas Instruments Shift Registers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# CD74HC194PWT++**Texas Instruments** · Shift Registers · TSSOP-16++CD74HC194PWT from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | MR | input | Asynchronous master reset, active low; a Low clears all four outputs Q0-Q3 to Low. |+| 2 | DSR | input | Serial data input for the shift-right mode. |+| 3 | D0 | input | Parallel data input 0, loaded to Q0 on the rising clock edge when S0 and S1 are high. |+| 4 | D1 | input | Parallel data input 1, loaded to Q1 on the rising clock edge when S0 and S1 are high. |+| 5 | D2 | input | Parallel data input 2, loaded to Q2 on the rising clock edge when S0 and S1 are high. |+| 6 | D3 | input | Parallel data input 3, loaded to Q3 on the rising clock edge when S0 and S1 are high. |+| 7 | DSL | input | Serial data input for the shift-left mode. |+| 8 | GND | power_in | Ground supply pin. |+| 9 | S0 | input | Mode select input 0; with S1 selects hold, shift right, shift left or parallel load. |+| 10 | S1 | input | Mode select input 1; with S0 selects hold, shift right, shift left or parallel load. |+| 11 | CP | input | Clock input; operations occur synchronously on the low-to-high transition. |+| 12 | Q3 | output | Register output 3; bus driver output capable of driving 15 LSTTL loads. |+| 13 | Q2 | output | Register output 2; bus driver output capable of driving 15 LSTTL loads. |+| 14 | Q1 | output | Register output 1; bus driver output capable of driving 15 LSTTL loads. |+| 15 | Q0 | output | Register output 0; bus driver output capable of driving 15 LSTTL loads. |+| 16 | VCC | power_in | Positive supply; 2V to 6V operation for HC types, absolute maximum -0.5V to 7V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CD74HC194PWT`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)+- 3D model files: `cd74hc194pwt-etched.step` / `cd74hc194pwt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74hc194pwt.step` / `cd74hc194pwt.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd74hc194) (19 pp, sha256 `b36bc476fcd32b97`, retrieved 2026-10-05, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd74hc194pwt-datasheet.pdf)
page.jsonadded+209@@ -0,0 +1,209 @@+{+ "slug": "cd74hc194pwt",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Shift Registers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd74hc194pwt",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd74hc194pwt.kicad_sym",+ "cd74hc194pwt.kicad_mod",+ "cd74hc194pwt.glb",+ "cd74hc194pwt.step",+ "cd74hc194pwt.lbr",+ "docs/hero.png",+ "docs/cd74hc194pwt-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "cd74hc194pwt-hero.glb",+ "cd74hc194pwt-hero.overlay.json"+ ],+ "component": {+ "mpn": "CD74HC194PWT",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Shift Registers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cd74hc194",+ "parts": {+ "symbol": "cd74hc194pwt.kicad_sym",+ "footprint": "cd74hc194pwt.kicad_mod",+ "model_3d": "cd74hc194pwt-hero.glb",+ "model_3d_plain": "cd74hc194pwt.glb",+ "model_3d_step": "cd74hc194pwt-etched.step",+ "model_3d_step_plain": "cd74hc194pwt.step",+ "lbr": "cd74hc194pwt.lbr"+ },+ "distributor_links": {+ "lcsc": 2864707,+ "digikey": "296-CD74HC194PWTTR-ND",+ "mouser": "595-CD74HC194PWT"+ },+ "distributor_check": {+ "checked_at": "2026-10-05T20:18:20Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-CD74HC194PWTTR-ND",+ "status": "found",+ "lifecycle": "Obsolete"+ },+ "mouser": {+ "pn": "595-CD74HC194PWT",+ "status": "found",+ "lifecycle": "Obsolete"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "MR",+ "type": "input",+ "description": "Asynchronous master reset, active low; a Low clears all four outputs Q0-Q3 to Low."+ },+ {+ "number": "2",+ "name": "DSR",+ "type": "input",+ "description": "Serial data input for the shift-right mode."+ },+ {+ "number": "3",+ "name": "D0",+ "type": "input",+ "description": "Parallel data input 0, loaded to Q0 on the rising clock edge when S0 and S1 are high."+ },+ {+ "number": "4",+ "name": "D1",+ "type": "input",+ "description": "Parallel data input 1, loaded to Q1 on the rising clock edge when S0 and S1 are high."+ },+ {+ "number": "5",+ "name": "D2",+ "type": "input",+ "description": "Parallel data input 2, loaded to Q2 on the rising clock edge when S0 and S1 are high."+ },+ {+ "number": "6",+ "name": "D3",+ "type": "input",+ "description": "Parallel data input 3, loaded to Q3 on the rising clock edge when S0 and S1 are high."+ },+ {+ "number": "7",+ "name": "DSL",+ "type": "input",+ "description": "Serial data input for the shift-left mode."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground supply pin."+ },+ {+ "number": "9",+ "name": "S0",+ "type": "input",+ "description": "Mode select input 0; with S1 selects hold, shift right, shift left or parallel load."+ },+ {+ "number": "10",+ "name": "S1",+ "type": "input",+ "description": "Mode select input 1; with S0 selects hold, shift right, shift left or parallel load."+ },+ {+ "number": "11",+ "name": "CP",+ "type": "input",+ "description": "Clock input; operations occur synchronously on the low-to-high transition."+ },+ {+ "number": "12",+ "name": "Q3",+ "type": "output",+ "description": "Register output 3; bus driver output capable of driving 15 LSTTL loads."+ },+ {+ "number": "13",+ "name": "Q2",+ "type": "output",+ "description": "Register output 2; bus driver output capable of driving 15 LSTTL loads."+ },+ {+ "number": "14",+ "name": "Q1",+ "type": "output",+ "description": "Register output 1; bus driver output capable of driving 15 LSTTL loads."+ },+ {+ "number": "15",+ "name": "Q0",+ "type": "output",+ "description": "Register output 0; bus driver output capable of driving 15 LSTTL loads."+ },+ {+ "number": "16",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply; 2V to 6V operation for HC types, absolute maximum -0.5V to 7V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin assignments for CP (pin 7) derived from Functional Diagram layout on PAGE 2 where it is listed s"+ ],+ "pages_sent": 19,+ "cost_usd": 0.1679,+ "at": "2026-10-05T20:18:04"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cd74hc194",+ "pages": 19,+ "sha256": "b36bc476fcd32b97",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}