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CD74HC173M96
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+53@@ -0,0 +1,53 @@+# CD74HC173M96++**Texas Instruments** · Flip Flops · SOIC-16++CD74HC173M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OE1 | input | Active-low three-state output enable 1; outputs go high-impedance when OE1 or OE2 (or both) is high, without affecting sequential operation. |+| 2 | OE2 | input | Active-low three-state output enable 2; outputs go high-impedance when OE1 or OE2 (or both) is high, without affecting sequential operation. |+| 3 | Q0 | tri_state | Three-state data output of flip-flop 0, changing on the positive-going clock edge and able to drive 15 LSTTL loads. |+| 4 | Q1 | tri_state | Three-state data output of flip-flop 1, changing on the positive-going clock edge and able to drive 15 LSTTL loads. |+| 5 | Q2 | tri_state | Three-state data output of flip-flop 2, changing on the positive-going clock edge and able to drive 15 LSTTL loads. |+| 6 | Q3 | tri_state | Three-state data output of flip-flop 3, changing on the positive-going clock edge and able to drive 15 LSTTL loads. |+| 7 | CP | input | Shared clock input; data outputs change on the low-to-high transition. |+| 8 | GND | power_in | Ground supply pin. |+| 9 | E1 | input | Active-low data enable 1; if either E1 or E2 is high, the flip-flops hold their present state. |+| 10 | E2 | input | Active-low data enable 2; if either E1 or E2 is high, the flip-flops hold their present state. |+| 11 | D3 | input | Data input to flip-flop 3, with 12 ns setup to clock at 4.5 V (HC, 25°C). |+| 12 | D2 | input | Data input to flip-flop 2, with 12 ns setup to clock at 4.5 V (HC, 25°C). |+| 13 | D1 | input | Data input to flip-flop 1, with 12 ns setup to clock at 4.5 V (HC, 25°C). |+| 14 | D0 | input | Data input to flip-flop 0, with 12 ns setup to clock at 4.5 V (HC, 25°C). |+| 15 | MR | input | Master reset; a logic high resets all flip-flops, forcing Q outputs low. |+| 16 | VCC | power_in | Supply voltage, 2 V to 6 V for HC types, with a 0.1 µF bypass capacitor recommended close to the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CD74HC173M96`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `cd74hc173m96-etched.step` / `cd74hc173m96-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74hc173m96.step` / `cd74hc173m96.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd74hct173) (26 pp, sha256 `64eda2d471cf665c`, retrieved 2026-10-01, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd74hc173m96-datasheet.pdf)
page.jsonadded+206@@ -0,0 +1,206 @@+{+ "slug": "cd74hc173m96",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Flip Flops, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd74hc173m96",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd74hc173m96.kicad_sym",+ "cd74hc173m96.kicad_mod",+ "cd74hc173m96.glb",+ "cd74hc173m96.step",+ "cd74hc173m96.lbr",+ "docs/hero.png",+ "docs/cd74hc173m96-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "CD74HC173M96",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Flip Flops",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cd74hct173",+ "parts": {+ "symbol": "cd74hc173m96.kicad_sym",+ "footprint": "cd74hc173m96.kicad_mod",+ "model_3d": "cd74hc173m96-etched.glb",+ "model_3d_plain": "cd74hc173m96.glb",+ "model_3d_step": "cd74hc173m96-etched.step",+ "model_3d_step_plain": "cd74hc173m96.step",+ "lbr": "cd74hc173m96.lbr"+ },+ "distributor_links": {+ "lcsc": "C2677807",+ "digikey": "296-31571-2-ND",+ "mouser": "595-CD74HC173M96"+ },+ "distributor_check": {+ "checked_at": "2026-10-01T05:33:38Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-31571-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-CD74HC173M96",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "OE1",+ "type": "input",+ "description": "Active-low three-state output enable 1; outputs go high-impedance when OE1 or OE2 (or both) is high, without affecting sequential operation."+ },+ {+ "number": "2",+ "name": "OE2",+ "type": "input",+ "description": "Active-low three-state output enable 2; outputs go high-impedance when OE1 or OE2 (or both) is high, without affecting sequential operation."+ },+ {+ "number": "3",+ "name": "Q0",+ "type": "tri_state",+ "description": "Three-state data output of flip-flop 0, changing on the positive-going clock edge and able to drive 15 LSTTL loads."+ },+ {+ "number": "4",+ "name": "Q1",+ "type": "tri_state",+ "description": "Three-state data output of flip-flop 1, changing on the positive-going clock edge and able to drive 15 LSTTL loads."+ },+ {+ "number": "5",+ "name": "Q2",+ "type": "tri_state",+ "description": "Three-state data output of flip-flop 2, changing on the positive-going clock edge and able to drive 15 LSTTL loads."+ },+ {+ "number": "6",+ "name": "Q3",+ "type": "tri_state",+ "description": "Three-state data output of flip-flop 3, changing on the positive-going clock edge and able to drive 15 LSTTL loads."+ },+ {+ "number": "7",+ "name": "CP",+ "type": "input",+ "description": "Shared clock input; data outputs change on the low-to-high transition."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground supply pin."+ },+ {+ "number": "9",+ "name": "E1",+ "type": "input",+ "description": "Active-low data enable 1; if either E1 or E2 is high, the flip-flops hold their present state."+ },+ {+ "number": "10",+ "name": "E2",+ "type": "input",+ "description": "Active-low data enable 2; if either E1 or E2 is high, the flip-flops hold their present state."+ },+ {+ "number": "11",+ "name": "D3",+ "type": "input",+ "description": "Data input to flip-flop 3, with 12 ns setup to clock at 4.5 V (HC, 25°C)."+ },+ {+ "number": "12",+ "name": "D2",+ "type": "input",+ "description": "Data input to flip-flop 2, with 12 ns setup to clock at 4.5 V (HC, 25°C)."+ },+ {+ "number": "13",+ "name": "D1",+ "type": "input",+ "description": "Data input to flip-flop 1, with 12 ns setup to clock at 4.5 V (HC, 25°C)."+ },+ {+ "number": "14",+ "name": "D0",+ "type": "input",+ "description": "Data input to flip-flop 0, with 12 ns setup to clock at 4.5 V (HC, 25°C)."+ },+ {+ "number": "15",+ "name": "MR",+ "type": "input",+ "description": "Master reset; a logic high resets all flip-flops, forcing Q outputs low."+ },+ {+ "number": "16",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage, 2 V to 6 V for HC types, with a 0.1 µF bypass capacitor recommended close to the pin."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-sonnet-5-5",+ "primary_mode": "text+vision",+ "consensus_model": "claude-opus-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 26,+ "cost_usd": 0.4804,+ "at": "2026-10-01T05:33:22"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cd74hct173",+ "pages": 26,+ "sha256": "64eda2d471cf665c",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}