component
CD4541BNSR
Public Made by Adomby adom
Texas Instruments Timers / Clock Oscillators, SOP-14-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+50@@ -0,0 +1,50 @@+# CD4541BNSR++**Texas Instruments** · Timers / Clock Oscillators · SOP-14-208mil++CD4541BNSR from Texas Instruments, in a SOP-14-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | RTC | passive | Oscillator timing resistor external connection; resistor value in combination with CTC capacitor sets oscillator frequency per f = 1/(2.3 × RTC × CTC). |+| 2 | CTC | passive | Oscillator timing capacitor external connection; capacitor value in combination with RTC resistor sets oscillator frequency per f = 1/(2.3 × RTC × CTC). |+| 3 | RS | input | External oscillator series resistor terminal or external clock input; can accept external clock signal applied to replace internal oscillator circuit. |+| 4 | NC | unconnected | No connection; internally unconnected pin. |+| 5 | AUTO RESET | input | Automatic power-on reset control input; logic 0 enables automatic reset circuit, logic 1 disables auto reset to reduce power dissipation. |+| 6 | MASTER RESET | input | Manual reset input; positive pulse resets all internal counters and latches and sets output to high state. |+| 7 | VSS | power_in | Ground and negative supply terminal reference. |+| 8 | OUTPUT | output | Timer output terminal; provides Q or Q output from selected counter stage (8th, 10th, 13th, or 16th stage selected by A and B inputs). |+| 9 | Q/Q SELECT | input | Output polarity selection input; determines whether output is normal Q or inverted Q from the selected counter stage. |+| 10 | MODE | input | Mode selection input; logic 1 selects recycle (frequency divider) mode for continuous square wave output, logic 0 selects single-transition timer mode. |+| 11 | NC | unconnected | No connection; internally unconnected pin. |+| 12 | A | input | Frequency selection input A; used with B input to select which counter stage (8th, 10th, 13th, or 16th) provides the output. |+| 13 | B | input | Frequency selection input B; used with A input to select which counter stage (8th, 10th, 13th, or 16th) provides the output. |+| 14 | VDD | power_in | Positive supply voltage terminal; device operates from 3V minimum to 20V maximum rated over -55°C to 125°C temperature range. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOP-14-208mil |+| Category | RTC/Clock Chip |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `CD4541BNSR`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOP-14-208mil (KiCad packages3D, STEP)+- 3D model files: `cd4541bnsr-etched.step` / `cd4541bnsr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4541bnsr.step` / `cd4541bnsr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd4541b) (22 pp, sha256 `1c648629cd0ba6ed`, retrieved 2026-10-03, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4541bnsr-datasheet.pdf)
page.jsonadded+195@@ -0,0 +1,195 @@+{+ "slug": "cd4541bnsr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Timers / Clock Oscillators, SOP-14-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "rtc-clock chip",+ "cd4541bnsr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd4541bnsr.kicad_sym",+ "cd4541bnsr.kicad_mod",+ "cd4541bnsr.glb",+ "cd4541bnsr.step",+ "cd4541bnsr.lbr",+ "docs/hero.png",+ "docs/cd4541bnsr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "cd4541bnsr-hero.glb",+ "cd4541bnsr-hero.overlay.json"+ ],+ "component": {+ "mpn": "CD4541BNSR",+ "manufacturer": "Texas Instruments",+ "package": "SOP-14-208mil",+ "pin_count": 14,+ "category": "RTC/Clock Chip",+ "subcategory": "Timers / Clock Oscillators",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cd4541b",+ "parts": {+ "symbol": "cd4541bnsr.kicad_sym",+ "footprint": "cd4541bnsr.kicad_mod",+ "model_3d": "cd4541bnsr-hero.glb",+ "model_3d_plain": "cd4541bnsr.glb",+ "model_3d_step": "cd4541bnsr-etched.step",+ "model_3d_step_plain": "cd4541bnsr.step",+ "lbr": "cd4541bnsr.lbr"+ },+ "distributor_links": {+ "lcsc": 1847956,+ "digikey": "296-CD4541BNSRTR-ND",+ "mouser": "595-CD4541BNSR"+ },+ "distributor_check": {+ "checked_at": "2026-10-03T05:22:40Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-CD4541BNSRTR-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-CD4541BNSR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "RTC",+ "type": "passive",+ "description": "Oscillator timing resistor external connection; resistor value in combination with CTC capacitor sets oscillator frequency per f = 1/(2.3 × RTC × CTC)."+ },+ {+ "number": "2",+ "name": "CTC",+ "type": "passive",+ "description": "Oscillator timing capacitor external connection; capacitor value in combination with RTC resistor sets oscillator frequency per f = 1/(2.3 × RTC × CTC)."+ },+ {+ "number": "3",+ "name": "RS",+ "type": "input",+ "description": "External oscillator series resistor terminal or external clock input; can accept external clock signal applied to replace internal oscillator circuit."+ },+ {+ "number": "4",+ "name": "NC",+ "type": "unconnected",+ "description": "No connection; internally unconnected pin."+ },+ {+ "number": "5",+ "name": "AUTO RESET",+ "type": "input",+ "description": "Automatic power-on reset control input; logic 0 enables automatic reset circuit, logic 1 disables auto reset to reduce power dissipation."+ },+ {+ "number": "6",+ "name": "MASTER RESET",+ "type": "input",+ "description": "Manual reset input; positive pulse resets all internal counters and latches and sets output to high state."+ },+ {+ "number": "7",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground and negative supply terminal reference."+ },+ {+ "number": "8",+ "name": "OUTPUT",+ "type": "output",+ "description": "Timer output terminal; provides Q or Q output from selected counter stage (8th, 10th, 13th, or 16th stage selected by A and B inputs)."+ },+ {+ "number": "9",+ "name": "Q/Q SELECT",+ "type": "input",+ "description": "Output polarity selection input; determines whether output is normal Q or inverted Q from the selected counter stage."+ },+ {+ "number": "10",+ "name": "MODE",+ "type": "input",+ "description": "Mode selection input; logic 1 selects recycle (frequency divider) mode for continuous square wave output, logic 0 selects single-transition timer mode."+ },+ {+ "number": "11",+ "name": "NC",+ "type": "unconnected",+ "description": "No connection; internally unconnected pin."+ },+ {+ "number": "12",+ "name": "A",+ "type": "input",+ "description": "Frequency selection input A; used with B input to select which counter stage (8th, 10th, 13th, or 16th) provides the output."+ },+ {+ "number": "13",+ "name": "B",+ "type": "input",+ "description": "Frequency selection input B; used with A input to select which counter stage (8th, 10th, 13th, or 16th) provides the output."+ },+ {+ "number": "14",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply voltage terminal; device operates from 3V minimum to 20V maximum rated over -55°C to 125°C temperature range."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Discrepancy between pinout diagram text (PAGE 1) and Figure 2 functional circuit (PAGE 2) regarding ; Pinout diagram formatting on PAGE 1 shows VSS and VDD labels on the left side layout, but functional"+ ],+ "pages_sent": 22,+ "cost_usd": 0.1778,+ "at": "2026-10-03T05:22:16"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cd4541b",+ "pages": 22,+ "sha256": "1c648629cd0ba6ed",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 14,+ "described": 14,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}