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Initial commit: component/cd4541bm96

Ray ·468473a4d1 ·
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README.mdadded+66
@@ -0,0 +1,66 @@+# CD4541BM96++**Texas Instruments** · Timers / Clock Oscillators · SOIC-14++CD4541BM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | RTC | passive | Timing resistor (RTC) connection for the internal RC oscillator. RTC together with CTC sets the oscillator frequency f = 1/(2.3 * RTC * CTC), valid between 1kHz and 100kHz. Can also serve as an external clock input on pin 3 when RS is used as the clock pin. |+| 2 | CTC | passive | Timing capacitor (CTC) connection for the internal RC oscillator. Sets the oscillator frequency together with RTC per f = 1/(2.3 * RTC * CTC). |+| 3 | RS | passive | Oscillator series/isolation resistor input. RS is recommended to be >= 10 kΩ and approximately 2*RTC. Pin 3 can also be driven with an external clock in place of the internal oscillator. |+| 4 | NC | unconnected | No internal connection. |+| 5 | AUTO_RESET | input | Auto-reset enable input. Logic 0 enables the automatic power-on reset circuit; logic 1 disables auto reset. With AUTO RESET enabled, an additional supply current is drawn (typ 7uA @5V, 30uA @10V, 80uA @15V). VDD should be > 5V for reliable auto power-on reset. |+| 6 | MASTER_RESET | input | Active-high master reset. A logic 1 pulse resets the internal counters and latch (Master Reset On); logic 0 = Master Reset Off. Minimum reset pulse width is 300 ns @5V, 100 ns @10V, 85 ns @15V (typ). |+| 7 | VSS | power_in | Negative supply / ground reference (0 V). All voltages are referenced to VSS. |+| 8 | OUTPUT | output | Timer output (Q or Q-bar depending on Q/Q-SELECT). Drives up to six low-power TTL loads, three low-power Schottky loads, or six HTL loads over the rated temperature range. Symmetrical output resistance typically 100 Ω at VDD = 15V. |+| 9 | Q/Q_SELECT | input | Output polarity select. Logic 0 = output initially low after reset (Q); logic 1 = output initially high after reset (Q-bar). |+| 10 | MODE | input | Output mode select. Logic 0 selects single-transition mode: after MASTER RESET the output changes state once after 2^(N-1) counts and remains until the next MASTER RESET or MODE=1. Logic 1 selects recycle mode: continuous square wave with frequency = oscillator/2^N. |+| 11 | NC | unconnected | No internal connection. |+| 12 | A | input | Frequency (stage) select input A. Together with B selects the counter tap N per the Frequency Selection Table: A/B = 00 -> N=13 (2^13 = 8192), 01 -> N=10 (1024), 10 -> N=8 (256), 11 -> N=16 (65536). |+| 13 | B | input | Frequency (stage) select input B. See input A for the A/B -> N mapping. |+| 14 | VDD | power_in | Positive supply. Operating range 3V (min) to 18V (typ), absolute max 20V referenced to VSS. Quiescent current 0.04 uA typ (5 uA max at 5V, 20 uA max at 15V). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-14 |+| Category | RTC |+| Pins | 14 |++## Ordering variants++- `CD4541BM96`+- `CD4541BM96BME4`+- `CD4541BM96BMG4`+- `CD4541BM96BMT`+- `CD4541BM96BMTG4`+- `CD4541BM96BNSR`+- `CD4541BM96BNSRG4`+- `CD4541BM96BE`+- `CD4541BM96BEE4`+- `CD4541BM96BF`+- `CD4541BM96BF3A`+- `CD4541BM96BPW`+- `CD4541BM96BPWR`+- `CD4541BM96BPWRG4`++## CAD (KiCad official)++- Symbol: `CD4541BM96`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd4541bm96.pdf) (17 pp, sha256 `d3a993c65b014aa0`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4541bm96-datasheet.pdf)
page.jsonadded+34
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