← Commit history

orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (DIGIKEY_PN 296-25956-2-ND, LCSC_PN C34809). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.

Ray ·d879aaf8c2 · ·parent 3919e61
2 files changed +29−7
cd4093bm96.lbr+21−2
@@ -68,6 +68,18 @@   <smd name="12" x="2.4750" y="1.2700" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="13" x="2.4750" y="2.5400" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="14" x="2.4750" y="3.8100" dx="1.9500" dy="0.6000" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-2.6000" y="4.3700"/>+    <vertex x="-2.8400" y="4.7000"/>+    <vertex x="-2.3600" y="4.7000"/>+  </polygon>+  <polygon width="0.1000" layer="51">+    <vertex x="-0.9750" y="4.3250"/>+    <vertex x="1.9500" y="4.3250"/>+    <vertex x="1.9500" y="-4.3250"/>+    <vertex x="-1.9500" y="-4.3250"/>+    <vertex x="-1.9500" y="3.3500"/>+  </polygon>   <wire x1="-2.0600" y1="4.4350" x2="2.0600" y2="4.4350" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="4.3700" x2="-2.0600" y2="4.4350" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="-4.4350" x2="-2.0600" y2="-4.3700" width="0.1200" layer="21"/>@@ -76,7 +88,7 @@   <wire x1="2.0600" y1="-4.4350" x2="-2.0600" y2="-4.4350" width="0.1200" layer="21"/>   <text x="0" y="5.385" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-5.385" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="4.3700"/><vertex x="-2.8400" y="4.7000"/><vertex x="-2.3600" y="4.7000"/></polygon></package>+</package> </packages> <symbols> <symbol name="CD4093BM96">@@ -126,7 +138,14 @@         <connect gate="G$1" pin="3F" pad="9"/>         <connect gate="G$1" pin="3E" pad="8"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="CD4093BM96" constant="no"/>+          <attribute name="MANUFACTURER" value="Texas Instruments" constant="no"/>+          <attribute name="DIGIKEY_PN" value="296-25956-2-ND" constant="no"/>+          <attribute name="LCSC_PN" value="C34809" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>
page.json+8−5
@@ -26,7 +26,10 @@       "model_3d_step": "cd4093bm96.step",       "lbr": "cd4093bm96.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "digikey": "296-25956-2-ND",+      "lcsc": "C34809"+    },     "pins": [       {         "number": "1",@@ -44,13 +47,13 @@         "number": "3",         "name": "1J",         "type": "output",-        "description": "NAND output of gate 1 (J = A·B, i.e. NAND of pins 1 and 2). Standardized symmetrical CMOS output; typical IOL/IOH ~1 mA at VDD=5 V, rising with supply."+        "description": "NAND output of gate 1 (J = A\u00b7B, i.e. NAND of pins 1 and 2). Standardized symmetrical CMOS output; typical IOL/IOH ~1 mA at VDD=5 V, rising with supply."       },       {         "number": "4",         "name": "2K",         "type": "output",-        "description": "NAND output of gate 2 (K = C·D, NAND of pins 5 and 6). Symmetrical CMOS push-pull output."+        "description": "NAND output of gate 2 (K = C\u00b7D, NAND of pins 5 and 6). Symmetrical CMOS push-pull output."       },       {         "number": "5",@@ -86,13 +89,13 @@         "number": "10",         "name": "3L",         "type": "output",-        "description": "NAND output of gate 3 (L = E·F, NAND of pins 8 and 9). Symmetrical CMOS push-pull output."+        "description": "NAND output of gate 3 (L = E\u00b7F, NAND of pins 8 and 9). Symmetrical CMOS push-pull output."       },       {         "number": "11",         "name": "4M",         "type": "output",-        "description": "NAND output of gate 4 (M = G·H, NAND of pins 12 and 13). Symmetrical CMOS push-pull output."+        "description": "NAND output of gate 4 (M = G\u00b7H, NAND of pins 12 and 13). Symmetrical CMOS push-pull output."       },       {         "number": "12",