component
CD4093BM96
Public Made by Adomby adom
Texas Instruments Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.md+14@@ -56,6 +56,20 @@ CD4093BM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions ext - Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm` - 3D model: SOIC-14 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`cd4093bm96.step`](cd4093bm96.step) | 195 KB | You want the bare part, or you mark your own boards. |+| [`cd4093bm96-etched.step`](cd4093bm96-etched.step) | 2.8 MB | You want the part with `CD4093BM96` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 674 faces against 237 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1@@ -1,6 +1,6 @@ { "slug": "cd4093bm96",- "version": "0.1.0",+ "version": "0.2.0", "type": "component", "description": "Texas Instruments Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "tags": [
page.json+9−9@@ -4,7 +4,7 @@ "slug": "cd4093bm96", "title": "CD4093BM96", "brief": "Texas Instruments Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.2.0", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -47,13 +47,13 @@ "number": "3", "name": "1J", "type": "output",- "description": "NAND output of gate 1 (J = A\u00b7B, i.e. NAND of pins 1 and 2). Standardized symmetrical CMOS output; typical IOL/IOH ~1 mA at VDD=5 V, rising with supply."+ "description": "NAND output of gate 1 (J = A·B, i.e. NAND of pins 1 and 2). Standardized symmetrical CMOS output; typical IOL/IOH ~1 mA at VDD=5 V, rising with supply." }, { "number": "4", "name": "2K", "type": "output",- "description": "NAND output of gate 2 (K = C\u00b7D, NAND of pins 5 and 6). Symmetrical CMOS push-pull output."+ "description": "NAND output of gate 2 (K = C·D, NAND of pins 5 and 6). Symmetrical CMOS push-pull output." }, { "number": "5",@@ -89,13 +89,13 @@ "number": "10", "name": "3L", "type": "output",- "description": "NAND output of gate 3 (L = E\u00b7F, NAND of pins 8 and 9). Symmetrical CMOS push-pull output."+ "description": "NAND output of gate 3 (L = E·F, NAND of pins 8 and 9). Symmetrical CMOS push-pull output." }, { "number": "11", "name": "4M", "type": "output",- "description": "NAND output of gate 4 (M = G\u00b7H, NAND of pins 12 and 13). Symmetrical CMOS push-pull output."+ "description": "NAND output of gate 4 (M = G·H, NAND of pins 12 and 13). Symmetrical CMOS push-pull output." }, { "number": "12",@@ -187,9 +187,9 @@ "docs/hero.png", "docs/cd4093bm96-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "pads.json" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "Texas Instruments Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D." }