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Set visibility: public

Ray ·16f447b8ba · ·parent 758a53c
1 file changed +9−6
page.json+9−6
@@ -44,13 +44,13 @@         "number": "3",         "name": "J",         "type": "output",-        "description": "Gate 1 NAND output (J = NOT(A\u00b7B)). CMOS push-pull output, IOH ~ -1.8 mA at VDD=5 V; IOL ~ 3.6 mA at VDD=5 V."+        "description": "Gate 1 NAND output (J = NOT(A·B)). CMOS push-pull output, IOH ~ -1.8 mA at VDD=5 V; IOL ~ 3.6 mA at VDD=5 V."       },       {         "number": "4",         "name": "K",         "type": "output",-        "description": "Gate 2 NAND output (K = NOT(C\u00b7D)). CMOS push-pull output driven by Schmitt-trigger inputs C and D."+        "description": "Gate 2 NAND output (K = NOT(C·D)). CMOS push-pull output driven by Schmitt-trigger inputs C and D."       },       {         "number": "5",@@ -86,13 +86,13 @@         "number": "10",         "name": "L",         "type": "output",-        "description": "Gate 3 NAND output (L = NOT(E\u00b7F)). CMOS push-pull output driven by Schmitt-trigger inputs E and F."+        "description": "Gate 3 NAND output (L = NOT(E·F)). CMOS push-pull output driven by Schmitt-trigger inputs E and F."       },       {         "number": "11",         "name": "M",         "type": "output",-        "description": "Gate 4 NAND output (M = NOT(G\u00b7H)). CMOS push-pull output driven by Schmitt-trigger inputs G and H."+        "description": "Gate 4 NAND output (M = NOT(G·H)). CMOS push-pull output driven by Schmitt-trigger inputs G and H."       },       {         "number": "12",@@ -110,7 +110,7 @@         "number": "14",         "name": "VDD",         "type": "power_in",-        "description": "Positive supply. Recommended operating range 3.0 V to 15 V; absolute maximum 20 V (spec limit 18 V). Input leakage IIN \u2264 1.2 \u00b5A and quiescent IDD \u2264 1.2 \u00b5A at VDD=18 V, Ta=25 \u00b0C."+        "description": "Positive supply. Recommended operating range 3.0 V to 15 V; absolute maximum 20 V (spec limit 18 V). Input leakage IIN ≤ 1.2 µA and quiescent IDD ≤ 1.2 µA at VDD=18 V, Ta=25 °C."       }     ],     "provenance": {@@ -174,5 +174,8 @@     "docs/cd4093bm-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file