component
CD4085BPWR
Public Made by Adomby adom
Texas Instruments Logic Gates, TSSOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+16−13@@ -32,37 +32,37 @@ "number": "1", "name": "A1", "type": "input",- "description": "Gate-1 A input. First input of the first 2-input AND gate feeding the gate-1 NOR/AOI network. CMOS logic input; VIH min = 3.5 V @ VDD = 5 V, 7 V @ 10 V, 11 V @ 15 V; input current typ \u00b11e-5 \u03bcA."+ "description": "Gate-1 A input. First input of the first 2-input AND gate feeding the gate-1 NOR/AOI network. CMOS logic input; VIH min = 3.5 V @ VDD = 5 V, 7 V @ 10 V, 11 V @ 15 V; input current typ ±1e-5 μA." }, { "number": "2", "name": "B1", "type": "input",- "description": "Gate-1 B input. Second input of the A1\u00b7B1 AND term feeding the gate-1 AOI network. Standard CMOS input, same DC characteristics as the other logic inputs."+ "description": "Gate-1 B input. Second input of the A1·B1 AND term feeding the gate-1 AOI network. Standard CMOS input, same DC characteristics as the other logic inputs." }, { "number": "3", "name": "E1", "type": "output",- "description": "Gate-1 AOI output. E1 = INHIBIT1 + A1\u00b7B1 + C1\u00b7D1 (active-high OR of the inhibit and the two AND terms, then inverted internally per B-series AOI convention). Standardized symmetrical CMOS output; IOL/IOH characterized at 5/10/15 V (e.g. IOL min 0.51 mA @ VDD=5 V, 1.3 mA @ 10 V, 3.4 mA @ 15 V)."+ "description": "Gate-1 AOI output. E1 = INHIBIT1 + A1·B1 + C1·D1 (active-high OR of the inhibit and the two AND terms, then inverted internally per B-series AOI convention). Standardized symmetrical CMOS output; IOL/IOH characterized at 5/10/15 V (e.g. IOL min 0.51 mA @ VDD=5 V, 1.3 mA @ 10 V, 3.4 mA @ 15 V)." }, { "number": "4", "name": "E2", "type": "output",- "description": "Gate-2 AOI output. E2 = INHIBIT2 + A2\u00b7B2 + C2\u00b7D2. Same drive characteristics as E1."+ "description": "Gate-2 AOI output. E2 = INHIBIT2 + A2·B2 + C2·D2. Same drive characteristics as E1." }, { "number": "5", "name": "A2", "type": "input",- "description": "Gate-2 A input. First input of the A2\u00b7B2 AND term feeding the gate-2 AOI network."+ "description": "Gate-2 A input. First input of the A2·B2 AND term feeding the gate-2 AOI network." }, { "number": "6", "name": "B2", "type": "input",- "description": "Gate-2 B input. Second input of the A2\u00b7B2 AND term feeding the gate-2 AOI network."+ "description": "Gate-2 B input. Second input of the A2·B2 AND term feeding the gate-2 AOI network." }, { "number": "7",@@ -74,37 +74,37 @@ "number": "8", "name": "C2", "type": "input",- "description": "Gate-2 C input. First input of the C2\u00b7D2 AND term feeding the gate-2 AOI network."+ "description": "Gate-2 C input. First input of the C2·D2 AND term feeding the gate-2 AOI network." }, { "number": "9", "name": "D2", "type": "input",- "description": "Gate-2 D input. Second input of the C2\u00b7D2 AND term feeding the gate-2 AOI network."+ "description": "Gate-2 D input. Second input of the C2·D2 AND term feeding the gate-2 AOI network." }, { "number": "10", "name": "INHIBIT1", "type": "input",- "description": "Gate-1 inhibit input. Active-high term inside the AOI expression E1 = INHIBIT1 + A1\u00b7B1 + C1\u00b7D1; forcing INHIBIT1 high forces E1 to the OR-then-inverted output state regardless of the AND terms. Individually controls gate 1 (allows use of the two AND gates and NOR gate independently, per the datasheet features list)."+ "description": "Gate-1 inhibit input. Active-high term inside the AOI expression E1 = INHIBIT1 + A1·B1 + C1·D1; forcing INHIBIT1 high forces E1 to the OR-then-inverted output state regardless of the AND terms. Individually controls gate 1 (allows use of the two AND gates and NOR gate independently, per the datasheet features list)." }, { "number": "11", "name": "INHIBIT2", "type": "input",- "description": "Gate-2 inhibit input. Same function as INHIBIT1 but for gate 2; drives the OR term inside E2 = INHIBIT2 + A2\u00b7B2 + C2\u00b7D2."+ "description": "Gate-2 inhibit input. Same function as INHIBIT1 but for gate 2; drives the OR term inside E2 = INHIBIT2 + A2·B2 + C2·D2." }, { "number": "12", "name": "C1", "type": "input",- "description": "Gate-1 C input. First input of the C1\u00b7D1 AND term feeding the gate-1 AOI network."+ "description": "Gate-1 C input. First input of the C1·D1 AND term feeding the gate-1 AOI network." }, { "number": "13", "name": "D1", "type": "input",- "description": "Gate-1 D input. Second input of the C1\u00b7D1 AND term feeding the gate-1 AOI network."+ "description": "Gate-1 D input. Second input of the C1·D1 AND term feeding the gate-1 AOI network." }, { "number": "14",@@ -208,5 +208,8 @@ "docs/cd4085bpwr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }