component
CD4073BM96
Public Made by Adomby adom
Texas Instruments Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+238−8@@ -1,13 +1,248 @@ {+ "schema_version": 1,+ "type": "component", "slug": "cd4073bm96",+ "title": "CD4073BM96",+ "brief": "Texas Instruments Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "cd4073bm96" ],+ "component": {+ "mpn": "CD4073BM96",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-14",+ "pin_count": 14,+ "category": "Logic",+ "subcategory": "Gates",+ "datasheet": "https://www.ti.com/lit/ds/symlink/cd4073bm96.pdf",+ "parts": {+ "symbol": "cd4073bm96.kicad_sym",+ "footprint": "cd4073bm96.kicad_mod",+ "model_3d": "cd4073bm96.glb",+ "model_3d_step": "cd4073bm96.step",+ "lbr": "cd4073bm96.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "1A",+ "type": "input",+ "description": "Gate 1 input A. CMOS logic input, VIH >= 3.5 V (at VDD=5 V), input current <= +/-0.1 uA typ. Protected by CMOS input-protection network."+ },+ {+ "number": "2",+ "name": "1B",+ "type": "input",+ "description": "Gate 1 input B. CMOS logic input, VIH >= 3.5 V (at VDD=5 V). Protected by CMOS input-protection network."+ },+ {+ "number": "3",+ "name": "2A",+ "type": "input",+ "description": "Gate 2 input A. CMOS logic input, VIH >= 3.5 V (at VDD=5 V). Protected by CMOS input-protection network."+ },+ {+ "number": "4",+ "name": "2B",+ "type": "input",+ "description": "Gate 2 input B. CMOS logic input, VIH >= 3.5 V (at VDD=5 V). Protected by CMOS input-protection network."+ },+ {+ "number": "5",+ "name": "2C",+ "type": "input",+ "description": "Gate 2 input C. CMOS logic input, VIH >= 3.5 V (at VDD=5 V). Protected by CMOS input-protection network."+ },+ {+ "number": "6",+ "name": "2Y",+ "type": "output",+ "description": "Gate 2 output. Rail-to-rail CMOS output; IOL >= 0.51 mA and IOH >= 0.51 mA at VDD=5 V. Output is high only when 2A, 2B and 2C are all high."+ },+ {+ "number": "7",+ "name": "VSS",+ "type": "power_in",+ "description": "Negative supply / ground reference (0 V). All input and output voltages referenced to VSS."+ },+ {+ "number": "8",+ "name": "3Y",+ "type": "output",+ "description": "Gate 3 output. Rail-to-rail CMOS output; IOL >= 0.51 mA and IOH >= 0.51 mA at VDD=5 V. Output is high only when 3A, 3B and 3C are all high."+ },+ {+ "number": "9",+ "name": "3A",+ "type": "input",+ "description": "Gate 3 input A. CMOS logic input, VIH >= 3.5 V (at VDD=5 V). Protected by CMOS input-protection network."+ },+ {+ "number": "10",+ "name": "3B",+ "type": "input",+ "description": "Gate 3 input B. CMOS logic input, VIH >= 3.5 V (at VDD=5 V). Protected by CMOS input-protection network."+ },+ {+ "number": "11",+ "name": "3C",+ "type": "input",+ "description": "Gate 3 input C. CMOS logic input, VIH >= 3.5 V (at VDD=5 V). Protected by CMOS input-protection network."+ },+ {+ "number": "12",+ "name": "1Y",+ "type": "output",+ "description": "Gate 1 output. Rail-to-rail CMOS output; IOL >= 0.51 mA and IOH >= 0.51 mA at VDD=5 V. Output is high only when 1A, 1B and 1C are all high."+ },+ {+ "number": "13",+ "name": "1C",+ "type": "input",+ "description": "Gate 1 input C. CMOS logic input, VIH >= 3.5 V (at VDD=5 V). Protected by CMOS input-protection network."+ },+ {+ "number": "14",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply. Recommended 3 V to 18 V; absolute maximum -0.5 V to +20 V. Bypass locally with a decoupling capacitor to VSS."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/cd4073bm96.pdf",+ "pages": 29,+ "sha256": "998cae23bbe77ddf",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 14,+ "described": 14,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "SOIC-14",+ "Category": "Logic",+ "Pins": "14"+ }+ },+ "variants": [+ {+ "mpn": "CD4073BM96",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96E4",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96G4",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BME4",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BMG4",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BMT",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BMTE4",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BMTG4",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BE",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BEE4",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BF",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BF3A",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BNSR",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BNSRE4",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BNSRG4",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BPW",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BPWE4",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BPWG4",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BPWR",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BPWRE4",+ "kind": "packaging"+ },+ {+ "mpn": "CD4073BM96BPWRG4",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "cd4073bm96"+ ],+ "discovery_pitch": "CD4073BM96 (Texas Instruments) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +260,5 @@ "docs/cd4073bm96-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }