component
CD4069UBE
Public Made by Adomby adom
Texas Instruments Inverters, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+51@@ -0,0 +1,51 @@+# CD4069UBE++**Texas Instruments** · Inverters · DIP-14++CD4069UBE from Texas Instruments, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A | input | Inverter input stage 1; accepts logic voltage from -0.5V to VDD+0.5V per Absolute Maximum Ratings |+| 2 | G = A | output | Inverter output stage 1; provides inverted logic signal with propagation delay tPHL/tPLH of 30ns typical at 10V |+| 3 | B | input | Inverter input stage 2; accepts logic voltage from -0.5V to VDD+0.5V per Absolute Maximum Ratings |+| 4 | H = B | output | Inverter output stage 2; provides inverted logic signal with propagation delay tPHL/tPLH of 30ns typical at 10V |+| 5 | C | input | Inverter input stage 3; accepts logic voltage from -0.5V to VDD+0.5V per Absolute Maximum Ratings |+| 6 | I = C | output | Inverter output stage 3; provides inverted logic signal with propagation delay tPHL/tPLH of 30ns typical at 10V |+| 7 | VSS | power_in | Negative supply connection and ground reference for device operation |+| 8 | J = D | output | Inverter output stage 4; provides inverted logic signal with propagation delay tPHL/tPLH of 30ns typical at 10V |+| 9 | D | input | Inverter input stage 4; accepts logic voltage from -0.5V to VDD+0.5V per Absolute Maximum Ratings |+| 10 | K = E | output | Inverter output stage 5; provides inverted logic signal with propagation delay tPHL/tPLH of 30ns typical at 10V |+| 11 | E | input | Inverter input stage 5; accepts logic voltage from -0.5V to VDD+0.5V per Absolute Maximum Ratings |+| 12 | L = F | output | Inverter output stage 6; provides inverted logic signal with propagation delay tPHL/tPLH of 30ns typical at 10V |+| 13 | F | input | Inverter input stage 6; accepts logic voltage from -0.5V to VDD+0.5V per Absolute Maximum Ratings |+| 14 | VDD | power_in | Positive supply voltage with recommended operating range of 3V to 18V and absolute maximum rating of 20V |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | DIP-14 |+| Category | Logic |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `CD4069UBE`+- Footprint: `Package_DIP:DIP-14_W7.62mm`+- 3D model: DIP-14 (KiCad packages3D, STEP)+- 3D model files: `cd4069ube-etched.step` / `cd4069ube-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4069ube.step` / `cd4069ube.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd4069ub) (34 pp, sha256 `5f18da9e2683e36e`, retrieved 2026-09-23, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4069ube-datasheet.pdf)
page.jsonadded+177@@ -0,0 +1,177 @@+{+ "slug": "cd4069ube",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Inverters, DIP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd4069ube",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd4069ube.kicad_sym",+ "cd4069ube.kicad_mod",+ "cd4069ube.glb",+ "cd4069ube.step",+ "cd4069ube.lbr",+ "docs/hero.png",+ "docs/cd4069ube-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "CD4069UBE",+ "manufacturer": "Texas Instruments",+ "package": "DIP-14",+ "pin_count": 14,+ "category": "Logic",+ "subcategory": "Inverters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cd4069ub",+ "parts": {+ "symbol": "cd4069ube.kicad_sym",+ "footprint": "cd4069ube.kicad_mod",+ "model_3d": "cd4069ube-etched.glb",+ "model_3d_plain": "cd4069ube.glb",+ "model_3d_step": "cd4069ube-etched.step",+ "model_3d_step_plain": "cd4069ube.step",+ "lbr": "cd4069ube.lbr"+ },+ "distributor_links": {+ "lcsc": "C5204"+ },+ "pins": [+ {+ "number": "1",+ "name": "A",+ "type": "input",+ "description": "Inverter input stage 1; accepts logic voltage from -0.5V to VDD+0.5V per Absolute Maximum Ratings"+ },+ {+ "number": "2",+ "name": "G = A",+ "type": "output",+ "description": "Inverter output stage 1; provides inverted logic signal with propagation delay tPHL/tPLH of 30ns typical at 10V"+ },+ {+ "number": "3",+ "name": "B",+ "type": "input",+ "description": "Inverter input stage 2; accepts logic voltage from -0.5V to VDD+0.5V per Absolute Maximum Ratings"+ },+ {+ "number": "4",+ "name": "H = B",+ "type": "output",+ "description": "Inverter output stage 2; provides inverted logic signal with propagation delay tPHL/tPLH of 30ns typical at 10V"+ },+ {+ "number": "5",+ "name": "C",+ "type": "input",+ "description": "Inverter input stage 3; accepts logic voltage from -0.5V to VDD+0.5V per Absolute Maximum Ratings"+ },+ {+ "number": "6",+ "name": "I = C",+ "type": "output",+ "description": "Inverter output stage 3; provides inverted logic signal with propagation delay tPHL/tPLH of 30ns typical at 10V"+ },+ {+ "number": "7",+ "name": "VSS",+ "type": "power_in",+ "description": "Negative supply connection and ground reference for device operation"+ },+ {+ "number": "8",+ "name": "J = D",+ "type": "output",+ "description": "Inverter output stage 4; provides inverted logic signal with propagation delay tPHL/tPLH of 30ns typical at 10V"+ },+ {+ "number": "9",+ "name": "D",+ "type": "input",+ "description": "Inverter input stage 4; accepts logic voltage from -0.5V to VDD+0.5V per Absolute Maximum Ratings"+ },+ {+ "number": "10",+ "name": "K = E",+ "type": "output",+ "description": "Inverter output stage 5; provides inverted logic signal with propagation delay tPHL/tPLH of 30ns typical at 10V"+ },+ {+ "number": "11",+ "name": "E",+ "type": "input",+ "description": "Inverter input stage 5; accepts logic voltage from -0.5V to VDD+0.5V per Absolute Maximum Ratings"+ },+ {+ "number": "12",+ "name": "L = F",+ "type": "output",+ "description": "Inverter output stage 6; provides inverted logic signal with propagation delay tPHL/tPLH of 30ns typical at 10V"+ },+ {+ "number": "13",+ "name": "F",+ "type": "input",+ "description": "Inverter input stage 6; accepts logic voltage from -0.5V to VDD+0.5V per Absolute Maximum Ratings"+ },+ {+ "number": "14",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply voltage with recommended operating range of 3V to 18V and absolute maximum rating of 20V"+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 34,+ "cost_usd": 0.2742,+ "at": "2026-09-23T18:03:20"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cd4069ub",+ "pages": 34,+ "sha256": "5f18da9e2683e36e",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 14,+ "described": 14,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}