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Initial commit: component/cd4069sa14-tr

Ray ·526748a7d1 ·
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README.mdadded+57
@@ -0,0 +1,57 @@+# CD4069SA14.TR++**Wuxi I core Elec CD4069SA14 TR** · Analog Switches, Multiplexers · SOP-14++CD4069SA14.TR from Wuxi I core Elec CD4069SA14 TR, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | Inverter 1 data input (A). CMOS logic input, VIL max 1 V @ VDD=5 V, VIH min 4 V @ VDD=5 V. Input leakage current typically ±10^-5 µA (max ±0.1 µA at 25 °C, VDD=15 V). Unused inputs must be tied to VDD, VSS, or another input. |+| 2 | 1Y | output | Inverter 1 data output (Y). Logical inversion of 1A: A=L → Y=H, A=H → Y=L. Symmetrical CMOS push-pull output; VOH ≥ 4.95 V and VOL ≤ 0.05 V at VDD=5 V. IOL/IOH ≈ ±0.41 mA at VDD=5 V. |+| 3 | 2A | input | Inverter 2 data input (A). Same CMOS input characteristics as pin 1. Must not be left floating; connect to VDD, VSS, or a driven signal. |+| 4 | 2Y | output | Inverter 2 data output (Y). Logical inversion of 2A. Same push-pull drive as inverter 1. |+| 5 | 3A | input | Inverter 3 data input (A). CMOS logic input; unused inputs must be tied to VDD, VSS, or another input. |+| 6 | 3Y | output | Inverter 3 data output (Y). Logical inversion of 3A. |+| 7 | VSS | power_in | Negative supply / ground reference (0 V). All voltages in the datasheet are referenced to VSS. Absolute-maximum VDD-VSS is -0.5 V to +18 V. |+| 8 | 4Y | output | Inverter 4 data output (Y). Logical inversion of 4A. |+| 9 | 4A | input | Inverter 4 data input (A). CMOS logic input; unused inputs must be tied to VDD, VSS, or another input. |+| 10 | 5Y | output | Inverter 5 data output (Y). Logical inversion of 5A. |+| 11 | 5A | input | Inverter 5 data input (A). CMOS logic input; unused inputs must be tied to VDD, VSS, or another input. |+| 12 | 6Y | output | Inverter 6 data output (Y). Logical inversion of 6A. |+| 13 | 6A | input | Inverter 6 data input (A). CMOS logic input; unused inputs must be tied to VDD, VSS, or another input. |+| 14 | VDD | power_in | Positive supply voltage. Recommended operating range 3 V to 15 V; absolute maximum -0.5 V to +18 V referenced to VSS. Supply current IDD typically 0.01 µA at 25 °C (max 1 µA at VDD=15 V). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Wuxi I core Elec CD4069SA14 TR |+| Package | SOP-14 |+| Category | Interface |+| Pins | 14 |++## Ordering variants++- `CD4069SA14.TR`+- `CD4069SA14.TRSA14.TB`+- `CD4069SA14.TRDA14.TB`+- `CD4069SA14.TRTA14.TR`+- `CD4069SA14.TRTA14.TB`++## CAD (KiCad official)++- Symbol: `CD4069SA14.TR`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOP-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Wuxi I core Elec CD4069SA14 TR datasheet](docs/cd4069sa14-tr-datasheet.pdf) (None pp, sha256 `fdb976e7be809ea1`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4069sa14-tr-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "cd4069sa14-tr",+  "version": "0.1.0",+  "type": "component",+  "description": "Wuxi I core Elec CD4069SA14 TR Analog Switches, Multiplexers, SOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "interface",+    "cd4069sa14.tr"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "cd4069sa14-tr.kicad_sym",+    "cd4069sa14-tr.kicad_mod",+    "cd4069sa14-tr.glb",+    "cd4069sa14-tr.step",+    "cd4069sa14-tr.lbr",+    "docs/hero.png",+    "docs/cd4069sa14-tr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file