CD4069UB Hex Inverter

@@ -0,0 +1,61 @@+# CD4069UB++**Texas Instruments** · Logic Gate · SOIC-14++The CD4069UB contains six independent inverters in the 4000B CMOS family. The unbuffered (UB) design gives a single inversion stage, which makes it handy not just for logic inversion but as a linear gain element in RC and crystal oscillators. It runs from 3 V to 18 V.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A | input | Inverter A input (channel 1). CMOS logic input, VIL ≤ 1 V @ VDD=5 V, VIH ≥ 4 V @ VDD=5 V. Input current typically ±10 pA @ 25 °C, ±1 µA max over full temperature range. Input capacitance 10 pF typ, 15 pF max. |+| 2 | G | output | Inverter A output (G = NOT A). CMOS push-pull output. VOH ≥ VDD − 0.05 V, VOL ≤ 0.05 V. Sinks ~0.51 mA typ (VO=0.4 V, VDD=5 V); sources ~-0.51 mA typ (VO=4.6 V, VDD=5 V). Dissipation ≤100 mW per output transistor. |+| 3 | B | input | Inverter B input (channel 2). CMOS logic input; same electrical thresholds as pin 1. |+| 4 | H | output | Inverter B output (H = NOT B). CMOS push-pull output; same drive characteristics as pin 2. |+| 5 | C | input | Inverter C input (channel 3). CMOS logic input; same electrical thresholds as pin 1. |+| 6 | I | output | Inverter C output (I = NOT C). CMOS push-pull output; same drive characteristics as pin 2. |+| 7 | VSS | power_in | Negative supply / ground reference. All voltages referenced to VSS. Typically tied to 0 V. |+| 8 | J | output | Inverter D output (J = NOT D). CMOS push-pull output; same drive characteristics as pin 2. |+| 9 | D | input | Inverter D input (channel 4). CMOS logic input; same electrical thresholds as pin 1. |+| 10 | K | output | Inverter E output (K = NOT E). CMOS push-pull output; same drive characteristics as pin 2. |+| 11 | E | input | Inverter E input (channel 5). CMOS logic input; same electrical thresholds as pin 1. |+| 12 | L | output | Inverter F output (L = NOT F). CMOS push-pull output; same drive characteristics as pin 2. |+| 13 | F | input | Inverter F input (channel 6). CMOS logic input; same electrical thresholds as pin 1. |+| 14 | VDD | power_in | Positive supply. Recommended operating range 3 V to 18 V (absolute max 20 V). Bypass with a 100 nF ceramic close to the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Type | Hex inverter (unbuffered) |+| Logic family | 4000B (CMOS) |+| Gates | 6 inverters |+| Supply voltage | 3 V to 18 V |+| Propagation delay | 30 ns typ at 10 V |+| Operating temperature | -55 C to 125 C |++## Ordering variants++- `CD4069UBE`+- `CD4069UBF`+- `CD4069UBM`+- `CD4069UBMT`+- `CD4069UBNSR`+- `CD4069UBPW`+- `CD4069UBPWR`++## CAD (KiCad official)++- Symbol: `cd4069.kicad_sym`+- Footprint: `cd4069.kicad_mod`+- 3D model: SOIC-14 body from KiCad `Package_SO/SOIC-14_3.9x8.7mm_P1.27mm`.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd4069ub.pdf) (34 pp, sha256 `bb3ad731a488a86f`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4069-datasheet.pdf)

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