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CD4068BM96
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Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+50@@ -0,0 +1,50 @@+# CD4068BM96++**Texas Instruments** · Logic Gates · SOIC-14++CD4068BM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | K | output | Buffered 8-input NAND output, K = NAND(A,B,C,D,E,F,G,H); drives to VOL/VOH limits per the static electrical characteristics table (e.g., VOL max 0.05V, VOH min 4.95V at VDD=5V). |+| 2 | A | input | Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max. |+| 3 | B | input | Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max. |+| 4 | C | input | Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max. |+| 5 | D | input | Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max. |+| 6 | NC | unconnected | No internal connection to the die; marked NC on the terminal assignment diagram. |+| 7 | VSS | power_in | Negative supply / ground reference terminal; all other pin voltages, including the -0.5V to VDD+0.5V input range, are referenced to this pin. |+| 8 | NC | unconnected | No internal connection to the die; marked NC on the terminal assignment diagram. |+| 9 | E | input | Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max. |+| 10 | F | input | Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max. |+| 11 | G | input | Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max. |+| 12 | H | input | Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max. |+| 13 | J | output | Buffered 8-input AND output, J = AND(A,B,C,D,E,F,G,H); drives to VOL/VOH limits per the static electrical characteristics table (e.g., VOL max 0.05V, VOH min 4.95V at VDD=5V). |+| 14 | VDD | power_in | Positive supply pin; absolute-maximum DC supply-voltage range is -0.5V to +20V referenced to VSS, with recommended operating supply-voltage range of 3V to 18V over the full package temperature range. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-14 |+| Category | Logic |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `CD4068BM96`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D, STEP)+- 3D model files: `cd4068bm96-etched.step` / `cd4068bm96-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4068bm96.step` / `cd4068bm96.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd4068b) (20 pp, sha256 `73f5f78780c4b47c`, retrieved 2026-09-23, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-sonnet-5` (text+vision), consensus `claude-opus-4-8` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4068bm96-datasheet.pdf)
page.jsonadded+179@@ -0,0 +1,179 @@+{+ "slug": "cd4068bm96",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Logic Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd4068bm96",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd4068bm96.kicad_sym",+ "cd4068bm96.kicad_mod",+ "cd4068bm96.glb",+ "cd4068bm96.step",+ "cd4068bm96.lbr",+ "docs/hero.png",+ "docs/cd4068bm96-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "CD4068BM96",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-14",+ "pin_count": 14,+ "category": "Logic",+ "subcategory": "Logic Gates",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cd4068b",+ "parts": {+ "symbol": "cd4068bm96.kicad_sym",+ "footprint": "cd4068bm96.kicad_mod",+ "model_3d": "cd4068bm96-etched.glb",+ "model_3d_plain": "cd4068bm96.glb",+ "model_3d_step": "cd4068bm96-etched.step",+ "model_3d_step_plain": "cd4068bm96.step",+ "lbr": "cd4068bm96.lbr"+ },+ "distributor_links": {+ "lcsc": "C2859569"+ },+ "pins": [+ {+ "number": "1",+ "name": "K",+ "type": "output",+ "description": "Buffered 8-input NAND output, K = NAND(A,B,C,D,E,F,G,H); drives to VOL/VOH limits per the static electrical characteristics table (e.g., VOL max 0.05V, VOH min 4.95V at VDD=5V)."+ },+ {+ "number": "2",+ "name": "A",+ "type": "input",+ "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max."+ },+ {+ "number": "3",+ "name": "B",+ "type": "input",+ "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max."+ },+ {+ "number": "4",+ "name": "C",+ "type": "input",+ "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max."+ },+ {+ "number": "5",+ "name": "D",+ "type": "input",+ "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max."+ },+ {+ "number": "6",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection to the die; marked NC on the terminal assignment diagram."+ },+ {+ "number": "7",+ "name": "VSS",+ "type": "power_in",+ "description": "Negative supply / ground reference terminal; all other pin voltages, including the -0.5V to VDD+0.5V input range, are referenced to this pin."+ },+ {+ "number": "8",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection to the die; marked NC on the terminal assignment diagram."+ },+ {+ "number": "9",+ "name": "E",+ "type": "input",+ "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max."+ },+ {+ "number": "10",+ "name": "F",+ "type": "input",+ "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max."+ },+ {+ "number": "11",+ "name": "G",+ "type": "input",+ "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max."+ },+ {+ "number": "12",+ "name": "H",+ "type": "input",+ "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max."+ },+ {+ "number": "13",+ "name": "J",+ "type": "output",+ "description": "Buffered 8-input AND output, J = AND(A,B,C,D,E,F,G,H); drives to VOL/VOH limits per the static electrical characteristics table (e.g., VOL max 0.05V, VOH min 4.95V at VDD=5V)."+ },+ {+ "number": "14",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply pin; absolute-maximum DC supply-voltage range is -0.5V to +20V referenced to VSS, with recommended operating supply-voltage range of 3V to 18V over the full package temperature range."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-sonnet-5",+ "primary_mode": "text+vision",+ "consensus_model": "claude-opus-4-8",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 20,+ "cost_usd": 0.5574,+ "at": "2026-09-23T05:06:47"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cd4068b",+ "pages": 20,+ "sha256": "73f5f78780c4b47c",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 14,+ "described": 14,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}