← Commit history

cd4068bm96: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)

Ray ·5476f8d90e · ·parent 76d352a
2 files changed +92−12
package.json+50−10
@@ -59,25 +59,25 @@         "number": "2",         "name": "A",         "type": "input",-        "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of \u00b110mA and input capacitance of 5pF typ / 7.5pF max."+        "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max."       },       {         "number": "3",         "name": "B",         "type": "input",-        "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of \u00b110mA and input capacitance of 5pF typ / 7.5pF max."+        "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max."       },       {         "number": "4",         "name": "C",         "type": "input",-        "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of \u00b110mA and input capacitance of 5pF typ / 7.5pF max."+        "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max."       },       {         "number": "5",         "name": "D",         "type": "input",-        "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of \u00b110mA and input capacitance of 5pF typ / 7.5pF max."+        "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max."       },       {         "number": "6",@@ -101,25 +101,25 @@         "number": "9",         "name": "E",         "type": "input",-        "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of \u00b110mA and input capacitance of 5pF typ / 7.5pF max."+        "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max."       },       {         "number": "10",         "name": "F",         "type": "input",-        "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of \u00b110mA and input capacitance of 5pF typ / 7.5pF max."+        "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max."       },       {         "number": "11",         "name": "G",         "type": "input",-        "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of \u00b110mA and input capacitance of 5pF typ / 7.5pF max."+        "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max."       },       {         "number": "12",         "name": "H",         "type": "input",-        "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of \u00b110mA and input capacitance of 5pF typ / 7.5pF max."+        "description": "Buffered logic input to the 8-input NAND/AND gate; accepts an input voltage range of -0.5V to VDD+0.5V with maximum DC input current of ±10mA and input capacitance of 5pF typ / 7.5pF max."       },       {         "number": "13",@@ -168,6 +168,46 @@     "viewers": {       "symbol": "viewers/symbol.html",       "footprint": "viewers/footprint.html"-    }+    },+    "models_3d": [+      {+        "file": "cd4068bm96.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6.0,+          8.7,+          1.75+        ],+        "zmin_mm": -0.0,+        "centre_offset_mm": 0.0,+        "footprint_binding": "identity",+        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "cd4068bm96-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6.0,+          8.7,+          1.75+        ],+        "zmin_mm": -0.0,+        "centre_offset_mm": 0.0,+        "footprint_binding": "identity",+        "sha256": "ec6fade5a72f1fb4bd3c8944e929c48feb195f1906a4730d41a0c3c78e4cf095",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]   }-}\ No newline at end of file+}
page.json+42−2
@@ -153,7 +153,47 @@     "viewers": {       "symbol": "viewers/symbol.html",       "footprint": "viewers/footprint.html"-    }+    },+    "models_3d": [+      {+        "file": "cd4068bm96.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6.0,+          8.7,+          1.75+        ],+        "zmin_mm": -0.0,+        "centre_offset_mm": 0.0,+        "footprint_binding": "identity",+        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "cd4068bm96-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6.0,+          8.7,+          1.75+        ],+        "zmin_mm": -0.0,+        "centre_offset_mm": 0.0,+        "footprint_binding": "identity",+        "sha256": "ec6fade5a72f1fb4bd3c8944e929c48feb195f1906a4730d41a0c3c78e4cf095",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]   },   "metadata": {     "specs": {@@ -201,4 +241,4 @@     "public": true   },   "updated_at": "2026-09-24T18:45:51.042Z"-}\ No newline at end of file+}