cd4052be

@@ -0,0 +1,61 @@+# CD4052BE++**HGSEMI** · Analog Switches, Multiplexers · DIP-16++CD4052BE from HGSEMI, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Y0 | passive | Y-side channel 0 analog I/O. Bidirectional analog switch terminal connected to COMY when A=0,B=0 and INH=0. Typical RON=60Ω at VDD-VEE=15V. |+| 2 | Y2 | passive | Y-side channel 2 analog I/O. Bidirectional analog switch terminal connected to COMY when A=0,B=1 and INH=0. |+| 3 | COMY | passive | Y-side common (pole) of the SP4T analog switch. Connected to Y0/Y1/Y2/Y3 according to the address inputs A,B when INH=0. |+| 4 | Y3 | passive | Y-side channel 3 analog I/O. Bidirectional analog switch terminal connected to COMY when A=1,B=1 and INH=0. |+| 5 | Y1 | passive | Y-side channel 1 analog I/O. Bidirectional analog switch terminal connected to COMY when A=1,B=0 and INH=0. |+| 6 | INH | input | Active-high inhibit (enable) digital input. INH=1 disables all channels (all switches OFF); INH=0 enables the channel selected by A,B. Logic thresholds: VIH≈0.7·VDD, VIL≈0.3·VDD. |+| 7 | VEE | power_in | Analog negative supply. Sets the negative excursion for analog signals routed through the switches. VDD-VEE ≤ 18V absolute max (15V recommended). Typically tied to VSS for single-supply digital-level analog switching. |+| 8 | VSS | power_in | Digital ground / negative logic supply (0V reference for control inputs A, B, INH). VDD-VSS operating range 3V-15V. |+| 9 | B | input | Binary address input B (MSB of the 2-bit channel select). Together with A selects one of four channels (X0/Y0..X3/Y3) when INH=0. |+| 10 | A | input | Binary address input A (LSB of the 2-bit channel select). Together with B selects one of four channels (X0/Y0..X3/Y3) when INH=0. |+| 11 | X3 | passive | X-side channel 3 analog I/O. Bidirectional analog switch terminal connected to COMX when A=1,B=1 and INH=0. |+| 12 | X0 | passive | X-side channel 0 analog I/O. Bidirectional analog switch terminal connected to COMX when A=0,B=0 and INH=0. |+| 13 | COMX | passive | X-side common (pole) of the SP4T analog switch. Connected to X0/X1/X2/X3 according to the address inputs A,B when INH=0. |+| 14 | X1 | passive | X-side channel 1 analog I/O. Bidirectional analog switch terminal connected to COMX when A=1,B=0 and INH=0. |+| 15 | X2 | passive | X-side channel 2 analog I/O. Bidirectional analog switch terminal connected to COMX when A=0,B=1 and INH=0. |+| 16 | VDD | power_in | Positive digital/analog supply. Operating range 3V-15V (VDD-VSS), absolute max 18V. Sets logic-input thresholds and the positive analog signal limit. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | HGSEMI |+| Package | DIP-16 |+| Category | Interface |+| Pins | 16 |++## Ordering variants++- `CD4052BEE`+- `CD4052BEN`+- `CD4052BEM/TR`+- `CD4052BEMT/TR`+- `CD4052BEMS/TR`+- `CD4052BELQ/TR`++## CAD (KiCad official)++- Symbol: `CD4052BE`+- Footprint: `Package_DIP:DIP-16_W7.62mm`+- 3D model: DIP-16 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [HGSEMI datasheet](docs/cd4052be-datasheet.pdf) (None pp, sha256 `1ca4ab36c8479262`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4052be-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "cd4052be",+  "version": "0.1.0",+  "type": "component",+  "description": "HGSEMI Analog Switches, Multiplexers, DIP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "interface",+    "cd4052be"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "cd4052be.kicad_sym",+    "cd4052be.kicad_mod",+    "cd4052be.glb",+    "cd4052be.step",+    "cd4052be.lbr",+    "docs/hero.png",+    "docs/cd4052be-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file