CD4050BM

@@ -0,0 +1,60 @@+# CD4050BM++**HGSEMI** · Buffer/Driver/Transceiver · SOP-16++CD4050BM from HGSEMI, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD | power_in | Positive supply rail. Recommended operating range 5 V to 15 V; absolute maximum -0.5 V to +18 V referenced to VSS. |+| 2 | G (1Y) | output | Buffer 1 output (non-inverting). Equal to logic level of input A on pin 3. Drives ~1 mA IOL at VDD=5 V, VO=0.4 V. |+| 3 | A (1A) | input | Buffer 1 input. High-voltage tolerant CMOS input (VIN may exceed VDD, up to +18 V absolute max). Non-inverting path to output G on pin 2. |+| 4 | H (2Y) | output | Buffer 2 output (non-inverting). Equal to logic level of input B on pin 5. |+| 5 | B (2A) | input | Buffer 2 input. High-voltage tolerant CMOS input (may exceed VDD up to +18 V abs max). Feeds output H on pin 4. |+| 6 | I (3Y) | output | Buffer 3 output (non-inverting). Equal to logic level of input C on pin 7. |+| 7 | C (3A) | input | Buffer 3 input. High-voltage tolerant CMOS input. Feeds output I on pin 6. |+| 8 | VSS | power_in | Negative supply / ground reference (0 V). All input/output levels are referenced to this pin. |+| 9 | D (4A) | input | Buffer 4 input. High-voltage tolerant CMOS input. Feeds output J on pin 10. |+| 10 | J (4Y) | output | Buffer 4 output (non-inverting). Equal to logic level of input D on pin 9. |+| 11 | E (5A) | input | Buffer 5 input. High-voltage tolerant CMOS input. Feeds output K on pin 12. |+| 12 | K (5Y) | output | Buffer 5 output (non-inverting). Equal to logic level of input E on pin 11. |+| 13 | NC | unconnected | No internal connection. Leave floating or tie to VSS/VDD per PCB convention. |+| 14 | F (6A) | input | Buffer 6 input. High-voltage tolerant CMOS input. Feeds output L on pin 15. |+| 15 | L (6Y) | output | Buffer 6 output (non-inverting). Equal to logic level of input F on pin 14. |+| 16 | NC | unconnected | No internal connection. Leave floating or tie to VSS/VDD per PCB convention. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | HGSEMI |+| Package | SOP-16 |+| Category | Logic |+| Pins | 16 |++## Ordering variants++- `CD4050BMCD4050BE`+- `CD4050BMCD4050BN`+- `CD4050BM/TR`+- `CD4050BMT/TR`+- `CD4050BMCD4050BLQ/TR`++## CAD (KiCad official)++- Symbol: `CD4050BM`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOP-16 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [HGSEMI datasheet](docs/cd4050bm-datasheet.pdf) (11 pp, sha256 `d1b47e24b0ba71a2`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4050bm-datasheet.pdf)

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