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Initial commit: component/cd4044bdr

Ray ·591a092d38 ·
2 files changed +114
README.mdadded+80
@@ -0,0 +1,80 @@+# CD4044BDR++**Texas Instruments** · Latches · SOIC-16++CD4044BDR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Q4 | tri_state | Latch 4 3-state output. Driven by latch 4 state when ENABLE=1; high-impedance when ENABLE=0. |+| 2 | NC | unconnected | No connection. |+| 3 | S1 | input | SET input for latch 1. Active-high; sets Q1 when asserted (subject to NAND latch truth table). |+| 4 | R1 | input | RESET input for latch 1. Active-high; resets Q1 when asserted (subject to NAND latch truth table). |+| 5 | R2 | input | RESET input for latch 2. |+| 6 | S2 | input | SET input for latch 2. |+| 7 | Q2 | tri_state | Latch 2 3-state output. Driven by latch 2 state when ENABLE=1; high-impedance when ENABLE=0. |+| 8 | VSS | power_in | Negative supply / ground reference (0 V). |+| 9 | ENABLE | input | Common 3-state ENABLE input for all four latch outputs. Logic '1' connects internal latch states to Q1-Q4; logic '0' places all Q outputs in high-impedance for common-bus operation. |+| 10 | Q3 | tri_state | Latch 3 3-state output. Driven by latch 3 state when ENABLE=1; high-impedance when ENABLE=0. |+| 11 | S3 | input | SET input for latch 3. |+| 12 | R3 | input | RESET input for latch 3. |+| 13 | Q1 | tri_state | Latch 1 3-state output. Driven by latch 1 state when ENABLE=1; high-impedance when ENABLE=0. |+| 14 | R4 | input | RESET input for latch 4. |+| 15 | S4 | input | SET input for latch 4. |+| 16 | VDD | power_in | Positive supply. Recommended operating range 3-18 V (absolute max −0.5 to +20 V referenced to VSS). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Logic |+| Pins | 16 |++## Ordering variants++Same part, different packaging or reel option.++- `CD4044BDRD`+- `CD4044BDRDE4`+- `CD4044BDRDG4`+- `CD4044BDR`+- `CD4044BDRE4`+- `CD4044BDRG4`+- `CD4044BDRDT`+- `CD4044BDRDTE4`+- `CD4044BDRDTG4`+- `CD4044BDRDW`+- `CD4044BDRDWE4`+- `CD4044BDRDWG4`+- `CD4044BDRDWR`+- `CD4044BDRDWRE4`+- `CD4044BDRDWRG4`+- `CD4044BDRNSR`+- `CD4044BDRNSRE4`+- `CD4044BDRNSRG4`+- `CD4044BDRPWR`+- `CD4044BDRPWRE4`+- `CD4044BDRPWRG4`+- `CD4044BDRE`+- `CD4044BDREE4`+- `CD4044BDRF3A`++## CAD (KiCad official)++- Symbol: `CD4044BDR`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd4044b.pdf) (36 pp, sha256 `6b350a9a8cdd953d`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4044bdr-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "cd4044bdr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Latches, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "cd4044bdr"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "cd4044bdr.kicad_sym",+    "cd4044bdr.kicad_mod",+    "cd4044bdr.glb",+    "cd4044bdr.step",+    "cd4044bdr.lbr",+    "docs/hero.png",+    "docs/cd4044bdr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file