CD4030BM96

@@ -0,0 +1,68 @@+# CD4030BM96++**Texas Instruments** · Gates · SOIC-14++CD4030BM96 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A | input | Input A of XOR gate 1. CMOS logic input; V_IL max 1.5 V @ VDD=5 V, V_IH min 3.5 V @ VDD=5 V. Input current 10 pA typ (1 uA max @ 18 V). |+| 2 | B | input | Input B of XOR gate 1. CMOS logic input paired with pin 1 to produce output J = A ⊕ B. |+| 3 | J | output | Output of XOR gate 1 (J = A ⊕ B). CMOS push-pull output; I_OL/I_OH min 0.51 mA @ VDD=5 V, 3.4 mA @ VDD=15 V. |+| 4 | K | output | Output of XOR gate 2 (K = C ⊕ D). CMOS push-pull output; symmetrical drive characteristics matching pin 3. |+| 5 | C | input | Input C of XOR gate 2. CMOS logic input, protected by internal CMOS protection network. |+| 6 | D | input | Input D of XOR gate 2. Paired with pin 5 to produce output K = C ⊕ D. |+| 7 | VSS | power_in | Negative supply / ground reference. Typically tied to 0 V. Voltage range referenced to VSS terminal per absolute maximum ratings. |+| 8 | E | input | Input E of XOR gate 3. CMOS logic input. |+| 9 | F | input | Input F of XOR gate 3. Paired with pin 8 to produce output L = E ⊕ F. |+| 10 | L | output | Output of XOR gate 3 (L = E ⊕ F). CMOS push-pull output. |+| 11 | M | output | Output of XOR gate 4 (M = G ⊕ H). CMOS push-pull output. |+| 12 | G | input | Input G of XOR gate 4. CMOS logic input. |+| 13 | H | input | Input H of XOR gate 4. Paired with pin 12 to produce output M = G ⊕ H. |+| 14 | VDD | power_in | Positive supply. Recommended operating range 3 V to 18 V; absolute max -0.5 V to +20 V referenced to VSS. Parametric ratings given at 5 V, 10 V, and 15 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++Same part, different packaging or reel option.++- `CD4030BM96M`+- `CD4030BM96`+- `CD4030BM96G4`+- `CD4030BM96MG4`+- `CD4030BM96MT`+- `CD4030BM96E`+- `CD4030BM96EE4`+- `CD4030BM96F`+- `CD4030BM96F3A`+- `CD4030BM96NSR`+- `CD4030BM96NSRG4`+- `CD4030BM96PW`+- `CD4030BM96PWG4`+- `CD4030BM96PWR`++## CAD (KiCad official)++- Symbol: `CD4030BM96`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd4030bm96.pdf) (16 pp, sha256 `56dc466294913d9c`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4030bm96-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "cd4030bm96",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "cd4030bm96"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "cd4030bm96.kicad_sym",+    "cd4030bm96.kicad_mod",+    "cd4030bm96.glb",+    "cd4030bm96.step",+    "cd4030bm96.lbr",+    "docs/hero.png",+    "docs/cd4030bm96-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file