component
CD4025B Triple NOR Gate
Public Made by Adomby adom
Triple NOR Gate in the 4000B CMOS family, 3 V to 18 V.
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page.json+155−8@@ -1,8 +1,11 @@ {+ "schema_version": 1,+ "type": "component", "slug": "cd4025",+ "title": "CD4025B Triple NOR Gate",+ "brief": "Triple NOR Gate in the 4000B CMOS family, 3 V to 18 V.", "version": "0.1.0",- "type": "component",- "description": "Triple NOR Gate in the 4000B CMOS family, 3 V to 18 V.",+ "license": "CC-BY-SA-4.0", "tags": [ "logic", "gate",@@ -11,6 +14,155 @@ "ti", "soic-14" ],+ "component": {+ "mpn": "CD4025B",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-14",+ "pin_count": 14,+ "category": "Logic",+ "subcategory": "Logic Gate",+ "datasheet": "https://www.ti.com/lit/ds/symlink/cd4025b.pdf",+ "parts": {+ "symbol": "cd4025.kicad_sym",+ "footprint": "cd4025.kicad_mod",+ "model_3d": "cd4025.glb",+ "model_3d_step": "cd4025.step"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "1A",+ "type": "input",+ "description": "Gate 1 input A. High-impedance CMOS input with internal protection diodes. Input high level VIH = 3.5 V (at VDD=5 V) / 11 V (at VDD=15 V)."+ },+ {+ "number": "2",+ "name": "1B",+ "type": "input",+ "description": "Gate 1 input B. High-impedance CMOS input; all three gate-1 inputs are ORed then inverted to produce output Y1 on pin 9."+ },+ {+ "number": "3",+ "name": "2A",+ "type": "input",+ "description": "Gate 2 input A. High-impedance CMOS input; contributes to NOR output Y2 on pin 6."+ },+ {+ "number": "4",+ "name": "2B",+ "type": "input",+ "description": "Gate 2 input B. High-impedance CMOS input; contributes to NOR output Y2 on pin 6."+ },+ {+ "number": "5",+ "name": "2C",+ "type": "input",+ "description": "Gate 2 input C. High-impedance CMOS input; contributes to NOR output Y2 on pin 6."+ },+ {+ "number": "6",+ "name": "2Y",+ "type": "output",+ "description": "Gate 2 output = NOR(2A, 2B, 2C). Buffered CMOS push-pull output; IOL/IOH \u2248 1 mA typical at VDD=10 V."+ },+ {+ "number": "7",+ "name": "VSS",+ "type": "power_in",+ "description": "Negative supply / ground reference. Normally tied to 0 V; all input and output voltages are referenced to VSS."+ },+ {+ "number": "8",+ "name": "1C",+ "type": "input",+ "description": "Gate 1 input C. High-impedance CMOS input; contributes to NOR output Y1 on pin 9."+ },+ {+ "number": "9",+ "name": "1Y",+ "type": "output",+ "description": "Gate 1 output = NOR(1A, 1B, 1C). Buffered CMOS push-pull output; symmetrical source/sink drive."+ },+ {+ "number": "10",+ "name": "3Y",+ "type": "output",+ "description": "Gate 3 output = NOR(3A, 3B, 3C). Buffered CMOS push-pull output."+ },+ {+ "number": "11",+ "name": "3A",+ "type": "input",+ "description": "Gate 3 input A. High-impedance CMOS input; contributes to NOR output Y3 on pin 10."+ },+ {+ "number": "12",+ "name": "3B",+ "type": "input",+ "description": "Gate 3 input B. High-impedance CMOS input; contributes to NOR output Y3 on pin 10."+ },+ {+ "number": "13",+ "name": "3C",+ "type": "input",+ "description": "Gate 3 input C. High-impedance CMOS input; contributes to NOR output Y3 on pin 10."+ },+ {+ "number": "14",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply. Recommended operating range 3 V to 18 V (absolute max 20 V). All inputs are protected by CMOS input protection network referenced between VDD and VSS."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/cd4025b.pdf",+ "pages": 23,+ "sha256": "d33d12a8e68dd293",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 14,+ "described": 14,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Type": "Triple NOR Gate",+ "Logic family": "4000B (CMOS)",+ "Supply voltage": "3 V to 18 V",+ "Propagation delay": "45 ns typ at 10 V",+ "Operating temperature": "-55 C to 125 C"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "Triple NOR Gate",+ "CMOS logic",+ "wide-voltage logic",+ "glue logic"+ ],+ "discovery_pitch": "The CD4025B contains three independent 3-input NOR gates; each output is high only when all three inputs are low.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -27,10 +179,5 @@ "docs/cd4025-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }