component
CD4019BPWR
Public Made by Adomby adom
Texas Instruments Logic Gates, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+210−8@@ -1,13 +1,220 @@ {+ "schema_version": 1,+ "type": "component", "slug": "cd4019bpwr",+ "title": "CD4019BPWR",+ "brief": "Texas Instruments Logic Gates, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments Logic Gates, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "cd4019bpwr" ],+ "component": {+ "mpn": "CD4019BPWR",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Logic Gates",+ "datasheet": "https://www.ti.com/lit/ds/symlink/cd4019b.pdf",+ "parts": {+ "symbol": "cd4019bpwr.kicad_sym",+ "footprint": "cd4019bpwr.kicad_mod",+ "model_3d": "cd4019bpwr.glb",+ "model_3d_step": "cd4019bpwr.step",+ "lbr": "cd4019bpwr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "B4",+ "type": "input",+ "description": "Channel-B data input to the 4th AND/OR select gate. Combined with Kb, contributes the B4\u00b7Kb term to output D4."+ },+ {+ "number": "2",+ "name": "A3",+ "type": "input",+ "description": "Channel-A data input to the 3rd AND/OR select gate. Combined with Ka, contributes the A3\u00b7Ka term to output D3."+ },+ {+ "number": "3",+ "name": "B3",+ "type": "input",+ "description": "Channel-B data input to the 3rd AND/OR select gate. Combined with Kb, contributes the B3\u00b7Kb term to output D3."+ },+ {+ "number": "4",+ "name": "A2",+ "type": "input",+ "description": "Channel-A data input to the 2nd AND/OR select gate. Combined with Ka, contributes the A2\u00b7Ka term to output D2."+ },+ {+ "number": "5",+ "name": "B2",+ "type": "input",+ "description": "Channel-B data input to the 2nd AND/OR select gate. Combined with Kb, contributes the B2\u00b7Kb term to output D2."+ },+ {+ "number": "6",+ "name": "A1",+ "type": "input",+ "description": "Channel-A data input to the 1st AND/OR select gate. Combined with Ka, contributes the A1\u00b7Ka term to output D1."+ },+ {+ "number": "7",+ "name": "B1",+ "type": "input",+ "description": "Channel-B data input to the 1st AND/OR select gate. Combined with Kb, contributes the B1\u00b7Kb term to output D1."+ },+ {+ "number": "8",+ "name": "VSS",+ "type": "power_in",+ "description": "Negative supply / ground reference. Operating supply (VDD \u2212 VSS) range is 3 V to 18 V; absolute maximum 20 V."+ },+ {+ "number": "9",+ "name": "Ka",+ "type": "input",+ "description": "Channel-A select control bit. When Ka = 1 the A-channel AND terms (An\u00b7Ka) propagate to the Dn outputs; when Ka = Kb = 1 the outputs form the OR (A+B) function."+ },+ {+ "number": "10",+ "name": "D1",+ "type": "output",+ "description": "Select-gate 1 output. D1 = A1\u00b7Ka + B1\u00b7Kb."+ },+ {+ "number": "11",+ "name": "D2",+ "type": "output",+ "description": "Select-gate 2 output. D2 = A2\u00b7Ka + B2\u00b7Kb."+ },+ {+ "number": "12",+ "name": "D3",+ "type": "output",+ "description": "Select-gate 3 output. D3 = A3\u00b7Ka + B3\u00b7Kb."+ },+ {+ "number": "13",+ "name": "D4",+ "type": "output",+ "description": "Select-gate 4 output. D4 = A4\u00b7Ka + B4\u00b7Kb."+ },+ {+ "number": "14",+ "name": "Kb",+ "type": "input",+ "description": "Channel-B select control bit. When Kb = 1 the B-channel AND terms (Bn\u00b7Kb) propagate to the Dn outputs; when Ka = Kb = 1 the outputs form the OR (A+B) function."+ },+ {+ "number": "15",+ "name": "A4",+ "type": "input",+ "description": "Channel-A data input to the 4th AND/OR select gate. Combined with Ka, contributes the A4\u00b7Ka term to output D4."+ },+ {+ "number": "16",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply. Operating range 3 V to 18 V referred to VSS; absolute maximum 20 V. Datasheet gives parametric ratings at 5 V, 10 V and 15 V."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/cd4019b.pdf",+ "pages": null,+ "sha256": "88db828df55fcfeb",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "TSSOP-16",+ "Category": "Logic",+ "Pins": "16"+ }+ },+ "variants": [+ {+ "mpn": "CD4019BPWR",+ "kind": "packaging"+ },+ {+ "mpn": "CD4019BPWRE",+ "kind": "packaging"+ },+ {+ "mpn": "CD4019BPWREE4",+ "kind": "packaging"+ },+ {+ "mpn": "CD4019BPWRF",+ "kind": "packaging"+ },+ {+ "mpn": "CD4019BPWRF3A",+ "kind": "packaging"+ },+ {+ "mpn": "CD4019BPWRJM38510/05352BEA",+ "kind": "packaging"+ },+ {+ "mpn": "CD4019BPWRM38510/05352BEA",+ "kind": "packaging"+ },+ {+ "mpn": "CD4019BPWRM",+ "kind": "packaging"+ },+ {+ "mpn": "CD4019BPWRM96",+ "kind": "packaging"+ },+ {+ "mpn": "CD4019BPWRMT",+ "kind": "packaging"+ },+ {+ "mpn": "CD4019BPWRNSR",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "cd4019bpwr"+ ],+ "discovery_pitch": "CD4019BPWR (Texas Instruments) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +232,5 @@ "docs/cd4019bpwr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }