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cd4017cm: factory component page (tier=lcsc)

Ray ·7166a9bfac · ·parent ba2d9c5
1 file changed +164−8
page.json+164−8
@@ -1,13 +1,174 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "cd4017cm",+  "title": "CD4017CM",+  "brief": "HGSEMI Counters / Dividers, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "HGSEMI Counters / Dividers, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "cd4017cm"   ],+  "component": {+    "mpn": "CD4017CM",+    "manufacturer": "HGSEMI",+    "package": "SOP-16",+    "pin_count": 16,+    "category": "Logic",+    "subcategory": "Counters / Dividers",+    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2402021505_HGSEMI-CD4017CM-TR_C20613261.pdf",+    "parts": {+      "symbol": "cd4017cm.kicad_sym",+      "footprint": "cd4017cm.kicad_mod",+      "model_3d": "cd4017cm.glb",+      "model_3d_step": "cd4017cm.step",+      "lbr": "cd4017cm.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "Q5",+        "type": "output",+        "description": "Decoded active-high output 5. High during the sixth clock state; typical CMOS output drive at VDD = 5-15 V."+      },+      {+        "number": "2",+        "name": "Q1",+        "type": "output",+        "description": "Decoded active-high output 1. High during the second clock state."+      },+      {+        "number": "3",+        "name": "Q0",+        "type": "output",+        "description": "Decoded active-high output 0. High during the first clock state and following reset."+      },+      {+        "number": "4",+        "name": "Q2",+        "type": "output",+        "description": "Decoded active-high output 2. High during the third clock state."+      },+      {+        "number": "5",+        "name": "Q6",+        "type": "output",+        "description": "Decoded active-high output 6. High during the seventh clock state."+      },+      {+        "number": "6",+        "name": "Q7",+        "type": "output",+        "description": "Decoded active-high output 7. High during the eighth clock state."+      },+      {+        "number": "7",+        "name": "Q3",+        "type": "output",+        "description": "Decoded active-high output 3. High during the fourth clock state."+      },+      {+        "number": "8",+        "name": "VSS",+        "type": "power_in",+        "description": "Negative supply / ground return. Tie to 0 V."+      },+      {+        "number": "9",+        "name": "Q8",+        "type": "output",+        "description": "Decoded active-high output 8. High during the ninth clock state."+      },+      {+        "number": "10",+        "name": "Q4",+        "type": "output",+        "description": "Decoded active-high output 4. High during the fifth clock state."+      },+      {+        "number": "11",+        "name": "Q9",+        "type": "output",+        "description": "Decoded active-high output 9. High during the tenth clock state."+      },+      {+        "number": "12",+        "name": "CARRY_OUT",+        "type": "output",+        "description": "Carry-out. Completes one full cycle every 10 clock input cycles; used to cascade CD4017 stages as a divide-by-10 chain."+      },+      {+        "number": "13",+        "name": "CLOCK_INHIBIT",+        "type": "input",+        "description": "Clock inhibit / clock-enable. When high, the counter is inhibited and holds its current state; when low, the counter advances on the positive clock edge."+      },+      {+        "number": "14",+        "name": "CLOCK",+        "type": "input",+        "description": "Clock input. The counter advances one count on each positive-going clock transition while CLOCK_INHIBIT and RESET are low."+      },+      {+        "number": "15",+        "name": "RESET",+        "type": "input",+        "description": "Asynchronous reset (active high). Forces the counter to state 0 (Q0 high, all other outputs low) independent of the clock."+      },+      {+        "number": "16",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive supply. Operating range 3 V to 15 V (absolute max 18 V)."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2402021505_HGSEMI-CD4017CM-TR_C20613261.pdf",+        "pages": 16,+        "sha256": "141ca40d50613ba8",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "HGSEMI",+      "Package": "SOP-16",+      "Category": "Logic",+      "Pins": "16"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "cd4017cm"+  ],+  "discovery_pitch": "CD4017CM (HGSEMI) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +186,5 @@     "docs/cd4017cm-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file