CD4011UBM96 - Commit

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cd4011ubm96: factory component page (tier=lcsc)

Ray ·4cd5cabc6c ·1mo ago ·parent d55ca9d

3 files changed +17357−31

cd4011ubm96-etched.glbcd4011ubm96-etched.step+17305 page.json+52−31

cd4011ubm96-etched.glbadded

⋯ 1 unchanged line ⋯

cd4011ubm96-etched.stepadded+17305

@@ -0,0 +1,17305 @@+ISO-10303-21;+HEADER;+FILE_DESCRIPTION(('Open CASCADE Model'),'2;1');+FILE_NAME('Open CASCADE Shape Model','2026-09-23T22:19:58',('Author'),(+    'Open CASCADE'),'Open CASCADE STEP processor 7.8','Open CASCADE 7.8'+  ,'Unknown');+FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }'));+ENDSEC;+DATA;+#1 = APPLICATION_PROTOCOL_DEFINITION('international standard',+  'automotive_design',2000,#2);+#2 = APPLICATION_CONTEXT(+  'core data for automotive mechanical design processes');+#3 = SHAPE_DEFINITION_REPRESENTATION(#4,#10);+#4 = PRODUCT_DEFINITION_SHAPE('','',#5);+#5 = PRODUCT_DEFINITION('design','',#6,#9);+#6 = PRODUCT_DEFINITION_FORMATION('','',#7);+#7 = PRODUCT('SOIC-14_3.9x8.7mm_P1.27mm','SOIC-14_3.9x8.7mm_P1.27mm','',+  (#8));+#8 = PRODUCT_CONTEXT('',#2,'mechanical');+#9 = PRODUCT_DEFINITION_CONTEXT('part definition',#2,'design');+#10 = SHAPE_REPRESENTATION('',(#11,#15,#19),#23);+#11 = AXIS2_PLACEMENT_3D('',#12,#13,#14);+#12 = CARTESIAN_POINT('',(0.,0.,0.));+#13 = DIRECTION('',(0.,0.,1.));+#14 = DIRECTION('',(1.,0.,-0.));+#15 = AXIS2_PLACEMENT_3D('',#16,#17,#18);+#16 = CARTESIAN_POINT('',(0.,0.,0.));+#17 = DIRECTION('',(0.,0.,1.));+#18 = DIRECTION('',(1.,0.,-0.));+#19 = AXIS2_PLACEMENT_3D('',#20,#21,#22);+#20 = CARTESIAN_POINT('',(0.,0.,0.));+#21 = DIRECTION('',(0.,0.,1.));+#22 = DIRECTION('',(1.,0.,-0.));+#23 = ( GEOMETRIC_REPRESENTATION_CONTEXT(3) +GLOBAL_UNCERTAINTY_ASSIGNED_CONTEXT((#27)) GLOBAL_UNIT_ASSIGNED_CONTEXT(+(#24,#25,#26)) REPRESENTATION_CONTEXT('Context #1',+  '3D Context with UNIT and UNCERTAINTY') );+#24 = ( LENGTH_UNIT() NAMED_UNIT(*) SI_UNIT(.MILLI.,.METRE.) );+#25 = ( NAMED_UNIT(*) PLANE_ANGLE_UNIT() SI_UNIT($,.RADIAN.) );+#26 = ( NAMED_UNIT(*) SI_UNIT($,.STERADIAN.) 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page.json+52−31

@@ -1,8 +1,11 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "cd4011ubm96",+  "title": "CD4011UBM96",+  "brief": "Texas Instruments Logic Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Texas Instruments Logic Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",@@ -10,24 +13,6 @@     "factory-2.0.0",     "extractor-text"   ],-  "dependencies": {},-  "hero": {-    "type": "image",-    "path": "docs/hero.png"-  },-  "files": [-    "page.json",-    "README.md",-    "cd4011ubm96.kicad_sym",-    "cd4011ubm96.kicad_mod",-    "cd4011ubm96.glb",-    "cd4011ubm96.step",-    "cd4011ubm96.lbr",-    "docs/hero.png",-    "docs/cd4011ubm96-datasheet.pdf",-    "viewers/symbol.html",-    "viewers/footprint.html"-  ],   "component": {     "mpn": "CD4011UBM96",     "manufacturer": "Texas Instruments",@@ -53,13 +38,13 @@         "number": "1",         "name": "A",         "type": "input",-        "description": "Input A to NAND gate 1 (with input B, output J); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA."+        "description": "Input A to NAND gate 1 (with input B, output J); input voltage range -0.5V to VDD+0.5V, max DC input current \u00b110mA."       },       {         "number": "2",         "name": "B",         "type": "input",-        "description": "Input B to NAND gate 1 (with input A, output J); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA."+        "description": "Input B to NAND gate 1 (with input A, output J); input voltage range -0.5V to VDD+0.5V, max DC input current \u00b110mA."       },       {         "number": "3",@@ -77,13 +62,13 @@         "number": "5",         "name": "C",         "type": "input",-        "description": "Input C to NAND gate 2 (with input D, output K); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA."+        "description": "Input C to NAND gate 2 (with input D, output K); input voltage range -0.5V to VDD+0.5V, max DC input current \u00b110mA."       },       {         "number": "6",         "name": "D",         "type": "input",-        "description": "Input D to NAND gate 2 (with input C, output K); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA."+        "description": "Input D to NAND gate 2 (with input C, output K); input voltage range -0.5V to VDD+0.5V, max DC input current \u00b110mA."       },       {         "number": "7",@@ -95,13 +80,13 @@         "number": "8",         "name": "E",         "type": "input",-        "description": "Input E to NAND gate 3 (with input F, output L); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA."+        "description": "Input E to NAND gate 3 (with input F, output L); input voltage range -0.5V to VDD+0.5V, max DC input current \u00b110mA."       },       {         "number": "9",         "name": "F",         "type": "input",-        "description": "Input F to NAND gate 3 (with input E, output L); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA."+        "description": "Input F to NAND gate 3 (with input E, output L); input voltage range -0.5V to VDD+0.5V, max DC input current \u00b110mA."       },       {         "number": "10",@@ -119,13 +104,13 @@         "number": "12",         "name": "G",         "type": "input",-        "description": "Input G to NAND gate 4 (with input H, output M); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA."+        "description": "Input G to NAND gate 4 (with input H, output M); input voltage range -0.5V to VDD+0.5V, max DC input current \u00b110mA."       },       {         "number": "13",         "name": "H",         "type": "input",-        "description": "Input H to NAND gate 4 (with input G, output M); input voltage range -0.5V to VDD+0.5V, max DC input current ±10mA."+        "description": "Input H to NAND gate 4 (with input G, output M); input voltage range -0.5V to VDD+0.5V, max DC input current \u00b110mA."       },       {         "number": "14",@@ -170,10 +155,46 @@       "footprint": "viewers/footprint.html"     }   },-  "visibility": "public",-  "org": "adom",+  "metadata": {+    "specs": {+      "Manufacturer": "Texas Instruments",+      "Package": "SOIC-14",+      "Category": "Logic",+      "Pins": "14"+    }+  },+  "variants": [],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "cd4011ubm96"+  ],+  "discovery_pitch": "CD4011UBM96 (Texas Instruments) component page with datasheet-verified CAD.",   "author": {     "name": "Ray",     "email": "[email protected]"-  }+  },+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "cd4011ubm96.kicad_sym",+    "cd4011ubm96.kicad_mod",+    "cd4011ubm96.glb",+    "cd4011ubm96.step",+    "cd4011ubm96.lbr",+    "docs/hero.png",+    "docs/cd4011ubm96-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ] }\ No newline at end of file