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Initial commit: component/cd4011bm

Ray ·f8947453ab ·
2 files changed +91
README.mdadded+57
@@ -0,0 +1,57 @@+# CD4011BM++**HGSEMI** · Gates · SOIC-14++CD4011BM from HGSEMI, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | I1 | input | Gate 1 input A. CMOS logic input; VIL max 1.5 V @ VDD=5 V, VIH min 3.5 V @ VDD=5 V. Input leakage <=0.3 uA typ at VDD=15 V. |+| 2 | I2 | input | Gate 1 input B. CMOS logic input paired with I1; NANDed to produce O1. |+| 3 | O1 | output | Gate 1 buffered NAND output = NAND(I1, I2). VOH >= VDD-0.05 V, VOL <= 0.05 V at |Io| < 1 uA. Sinks/sources 0.44 mA at VDD=5 V (typ). |+| 4 | O2 | output | Gate 2 buffered NAND output = NAND(I3, I4). Buffered CMOS output. |+| 5 | I3 | input | Gate 2 input A. CMOS logic input. |+| 6 | I4 | input | Gate 2 input B. CMOS logic input paired with I3. |+| 7 | VSS | power_in | Ground / negative supply reference (0 V). All input logic levels referenced to VSS. |+| 8 | I5 | input | Gate 3 input A. CMOS logic input. |+| 9 | I6 | input | Gate 3 input B. CMOS logic input paired with I5. |+| 10 | O3 | output | Gate 3 buffered NAND output = NAND(I5, I6). |+| 11 | O4 | output | Gate 4 buffered NAND output = NAND(I7, I8). |+| 12 | I7 | input | Gate 4 input A. CMOS logic input. |+| 13 | I8 | input | Gate 4 input B. CMOS logic input paired with I7. |+| 14 | VDD | power_in | Positive supply. Recommended VDD = 3 V to 15 V; absolute max -0.5 V to +18 V. Quiescent current IDD <= 7.5 uA at VDD=5 V (25 degC). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | HGSEMI |+| Package | SOIC-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++- `CD4011BMBM/TR`+- `CD4011BMBE`+- `CD4011BMBN`+- `CD4011BMBMT/TR`++## CAD (KiCad official)++- Symbol: `CD4011BM`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [HGSEMI datasheet](docs/cd4011bm-datasheet.pdf) (10 pp, sha256 `5f5ccfab60c3ae62`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4011bm-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "cd4011bm",+  "version": "0.1.0",+  "type": "component",+  "description": "HGSEMI Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "cd4011bm"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "cd4011bm.kicad_sym",+    "cd4011bm.kicad_mod",+    "cd4011bm.glb",+    "cd4011bm.step",+    "cd4011bm.lbr",+    "docs/hero.png",+    "docs/cd4011bm-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file