CD40109BPWR

@@ -0,0 +1,71 @@+# CD40109BPWR++**Texas Instruments** · Translators / Level Shifters · TSSOP-16++CD40109BPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC | power_in | Low-voltage supply for the input logic side. Recommended 3-18V; must be ≤ VDD in normal use (mode VCC > VDD is allowed for high-to-low shifting). |+| 2 | ENABLE A | input | Three-state enable for channel A→E output. Logic 1 (=VCC) enables the output; logic 0 (=VSS) places output E in high-impedance state. |+| 3 | A | input | Low-voltage logic data input for channel A. Logic 1 = VCC, logic 0 = VSS; shifted to output E at VDD levels. |+| 4 | E | tri_state | High-voltage three-state logic output for channel A→E. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE A = 0. |+| 5 | F | tri_state | High-voltage three-state logic output for channel B→F. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE B = 0. |+| 6 | B | input | Low-voltage logic data input for channel B. Logic 1 = VCC, logic 0 = VSS; shifted to output F at VDD levels. |+| 7 | ENABLE B | input | Three-state enable for channel B→F output. Logic 1 = VCC enables the output; logic 0 places output F in high-impedance state. |+| 8 | VSS | power_in | Ground / negative supply, common to both VCC and VDD rails. |+| 9 | ENABLE C | input | Three-state enable for channel C→G output. Logic 1 = VCC enables the output; logic 0 places output G in high-impedance state. |+| 10 | C | input | Low-voltage logic data input for channel C. Logic 1 = VCC, logic 0 = VSS; shifted to output G at VDD levels. |+| 11 | G | tri_state | High-voltage three-state logic output for channel C→G. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE C = 0. |+| 12 | NC | unconnected | No internal connection. Leave floating or tie as convenient for PCB routing. |+| 13 | H | tri_state | High-voltage three-state logic output for channel D→H. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE D = 0. |+| 14 | D | input | Low-voltage logic data input for channel D. Logic 1 = VCC, logic 0 = VSS; shifted to output H at VDD levels. |+| 15 | ENABLE D | input | Three-state enable for channel D→H output. Logic 1 = VCC enables the output; logic 0 places output H in high-impedance state. |+| 16 | VDD | power_in | High-voltage supply for the output side. Recommended 3-18V; sets the output logic-1 level. Absolute max 20V referenced to VSS. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-16 |+| Category | Logic |+| Pins | 16 |++## Ordering variants++- `CD40109BPWRPW`+- `CD40109BPWRPWR`+- `CD40109BPWRPWRE4`+- `CD40109BPWRPWRG4`+- `CD40109BPWRPW.A`+- `CD40109BPWRPWR.A`+- `CD40109BPWRNSR`+- `CD40109BPWRNSRE4`+- `CD40109BPWRNSR.A`+- `CD40109BPWRE`+- `CD40109BPWRBE`+- `CD40109BPWRBE.A`+- `CD40109BPWRF`+- `CD40109BPWRBF`+- `CD40109BPWRBF3A`+- `CD40109BPWRBF.A`+- `CD40109BPWRBF3A.A`++## CAD (KiCad official)++- Symbol: `CD40109BPWR`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd40109b.pdf) (18 pp, sha256 `945f61ad7c94f1e9`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd40109bpwr-datasheet.pdf)

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