component
CD40109BPWR
Public Made by Adomby adom
Texas Instruments Translators / Level Shifters, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+13−10@@ -32,13 +32,13 @@ "number": "1", "name": "VCC", "type": "power_in",- "description": "Low-voltage supply for the input logic side. Recommended 3-18V; must be \u2264 VDD in normal use (mode VCC > VDD is allowed for high-to-low shifting)."+ "description": "Low-voltage supply for the input logic side. Recommended 3-18V; must be ≤ VDD in normal use (mode VCC > VDD is allowed for high-to-low shifting)." }, { "number": "2", "name": "ENABLE A", "type": "input",- "description": "Three-state enable for channel A\u2192E output. Logic 1 (=VCC) enables the output; logic 0 (=VSS) places output E in high-impedance state."+ "description": "Three-state enable for channel A→E output. Logic 1 (=VCC) enables the output; logic 0 (=VSS) places output E in high-impedance state." }, { "number": "3",@@ -50,13 +50,13 @@ "number": "4", "name": "E", "type": "tri_state",- "description": "High-voltage three-state logic output for channel A\u2192E. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE A = 0."+ "description": "High-voltage three-state logic output for channel A→E. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE A = 0." }, { "number": "5", "name": "F", "type": "tri_state",- "description": "High-voltage three-state logic output for channel B\u2192F. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE B = 0."+ "description": "High-voltage three-state logic output for channel B→F. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE B = 0." }, { "number": "6",@@ -68,7 +68,7 @@ "number": "7", "name": "ENABLE B", "type": "input",- "description": "Three-state enable for channel B\u2192F output. Logic 1 = VCC enables the output; logic 0 places output F in high-impedance state."+ "description": "Three-state enable for channel B→F output. Logic 1 = VCC enables the output; logic 0 places output F in high-impedance state." }, { "number": "8",@@ -80,7 +80,7 @@ "number": "9", "name": "ENABLE C", "type": "input",- "description": "Three-state enable for channel C\u2192G output. Logic 1 = VCC enables the output; logic 0 places output G in high-impedance state."+ "description": "Three-state enable for channel C→G output. Logic 1 = VCC enables the output; logic 0 places output G in high-impedance state." }, { "number": "10",@@ -92,7 +92,7 @@ "number": "11", "name": "G", "type": "tri_state",- "description": "High-voltage three-state logic output for channel C\u2192G. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE C = 0."+ "description": "High-voltage three-state logic output for channel C→G. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE C = 0." }, { "number": "12",@@ -104,7 +104,7 @@ "number": "13", "name": "H", "type": "tri_state",- "description": "High-voltage three-state logic output for channel D\u2192H. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE D = 0."+ "description": "High-voltage three-state logic output for channel D→H. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE D = 0." }, { "number": "14",@@ -116,7 +116,7 @@ "number": "15", "name": "ENABLE D", "type": "input",- "description": "Three-state enable for channel D\u2192H output. Logic 1 = VCC enables the output; logic 0 places output H in high-impedance state."+ "description": "Three-state enable for channel D→H output. Logic 1 = VCC enables the output; logic 0 places output H in high-impedance state." }, { "number": "16",@@ -186,5 +186,8 @@ "docs/cd40109bpwr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }