← Commit history

Publish 0.2.0

Ray ·6b660518a7 · ·parent 47b4065
3 files changed +29−15
README.md+14
@@ -59,6 +59,20 @@ CD40109BPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions e - Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm` - 3D model: TSSOP-16 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`cd40109bpwr.step`](cd40109bpwr.step) | 205 KB | You want the bare part, or you mark your own boards. |+| [`cd40109bpwr-etched.step`](cd40109bpwr-etched.step) | 2.8 MB | You want the part with `CD40109BPWR` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 685 faces against 255 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance  Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1
@@ -1,6 +1,6 @@ {   "slug": "cd40109bpwr",-  "version": "0.1.0",+  "version": "0.2.0",   "type": "component",   "description": "Texas Instruments Translators / Level Shifters, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "tags": [
page.json+14−14
@@ -4,7 +4,7 @@   "slug": "cd40109bpwr",   "title": "CD40109BPWR",   "brief": "Texas Instruments Translators / Level Shifters, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",-  "version": "0.1.0",+  "version": "0.2.0",   "license": "CC-BY-SA-4.0",   "tags": [     "component",@@ -35,13 +35,13 @@         "number": "1",         "name": "VCC",         "type": "power_in",-        "description": "Low-voltage supply for the input logic side. Recommended 3-18V; must be \u2264 VDD in normal use (mode VCC > VDD is allowed for high-to-low shifting)."+        "description": "Low-voltage supply for the input logic side. Recommended 3-18V; must be ≤ VDD in normal use (mode VCC > VDD is allowed for high-to-low shifting)."       },       {         "number": "2",         "name": "ENABLE A",         "type": "input",-        "description": "Three-state enable for channel A\u2192E output. Logic 1 (=VCC) enables the output; logic 0 (=VSS) places output E in high-impedance state."+        "description": "Three-state enable for channel A→E output. Logic 1 (=VCC) enables the output; logic 0 (=VSS) places output E in high-impedance state."       },       {         "number": "3",@@ -53,13 +53,13 @@         "number": "4",         "name": "E",         "type": "tri_state",-        "description": "High-voltage three-state logic output for channel A\u2192E. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE A = 0."+        "description": "High-voltage three-state logic output for channel A→E. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE A = 0."       },       {         "number": "5",         "name": "F",         "type": "tri_state",-        "description": "High-voltage three-state logic output for channel B\u2192F. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE B = 0."+        "description": "High-voltage three-state logic output for channel B→F. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE B = 0."       },       {         "number": "6",@@ -71,7 +71,7 @@         "number": "7",         "name": "ENABLE B",         "type": "input",-        "description": "Three-state enable for channel B\u2192F output. Logic 1 = VCC enables the output; logic 0 places output F in high-impedance state."+        "description": "Three-state enable for channel B→F output. Logic 1 = VCC enables the output; logic 0 places output F in high-impedance state."       },       {         "number": "8",@@ -83,7 +83,7 @@         "number": "9",         "name": "ENABLE C",         "type": "input",-        "description": "Three-state enable for channel C\u2192G output. Logic 1 = VCC enables the output; logic 0 places output G in high-impedance state."+        "description": "Three-state enable for channel C→G output. Logic 1 = VCC enables the output; logic 0 places output G in high-impedance state."       },       {         "number": "10",@@ -95,7 +95,7 @@         "number": "11",         "name": "G",         "type": "tri_state",-        "description": "High-voltage three-state logic output for channel C\u2192G. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE C = 0."+        "description": "High-voltage three-state logic output for channel C→G. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE C = 0."       },       {         "number": "12",@@ -107,7 +107,7 @@         "number": "13",         "name": "H",         "type": "tri_state",-        "description": "High-voltage three-state logic output for channel D\u2192H. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE D = 0."+        "description": "High-voltage three-state logic output for channel D→H. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE D = 0."       },       {         "number": "14",@@ -119,7 +119,7 @@         "number": "15",         "name": "ENABLE D",         "type": "input",-        "description": "Three-state enable for channel D\u2192H output. Logic 1 = VCC enables the output; logic 0 places output H in high-impedance state."+        "description": "Three-state enable for channel D→H output. Logic 1 = VCC enables the output; logic 0 places output H in high-impedance state."       },       {         "number": "16",@@ -199,9 +199,9 @@     "docs/hero.png",     "docs/cd40109bpwr-datasheet.pdf",     "viewers/symbol.html",-    "viewers/footprint.html"+    "viewers/footprint.html",+    "pads.json"   ],-  "visibility": {-    "public": true-  }+  "visibility": "public",+  "description": "Texas Instruments Translators / Level Shifters, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D." }\ No newline at end of file