component
CD40109BPWR
Public Made by Adomby adom
Texas Instruments Translators / Level Shifters, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (DIGIKEY_PN 296-12163-2-ND, LCSC_PN C131950). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+42−20
cd40109bpwr.lbr+29−10@@ -70,11 +70,23 @@ <smd name="14" x="2.8625" y="0.9750" dx="1.4750" dy="0.4000" layer="1"/> <smd name="15" x="2.8625" y="1.6250" dx="1.4750" dy="0.4000" layer="1"/> <smd name="16" x="2.8625" y="2.2750" dx="1.4750" dy="0.4000" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-3.8600" y="2.2800"/>+ <vertex x="-4.1900" y="2.0400"/>+ <vertex x="-4.1900" y="2.5200"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-1.2000" y="2.5000"/>+ <vertex x="2.2000" y="2.5000"/>+ <vertex x="2.2000" y="-2.5000"/>+ <vertex x="-2.2000" y="-2.5000"/>+ <vertex x="-2.2000" y="1.5000"/>+ </polygon> <wire x1="-2.3100" y1="2.7350" x2="2.3100" y2="2.7350" width="0.1200" layer="21"/> <wire x1="2.3100" y1="-2.7350" x2="-2.3100" y2="-2.7350" width="0.1200" layer="21"/> <text x="0" y="3.613" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-3.613" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-3.8600" y="2.2800"/><vertex x="-4.1900" y="2.0400"/><vertex x="-4.1900" y="2.5200"/></polygon></package>+</package> </packages> <symbols> <symbol name="CD40109BPWR">@@ -85,21 +97,21 @@ <text x="0" y="12.7" size="1.27" layer="95" align="bottom-center">>NAME</text> <text x="0" y="-15.239999999999998" size="1.27" layer="96" align="top-center">>VALUE</text> <pin name="VCC" x="-17.78" y="7.62" length="middle" direction="pwr"/>- <pin name="ENABLE A" x="-17.78" y="5.08" length="middle" direction="in"/>+ <pin name="ENABLE_A" x="-17.78" y="5.08" length="middle" direction="in"/> <pin name="A" x="-17.78" y="2.54" length="middle" direction="in"/> <pin name="E" x="-17.78" y="0" length="middle" direction="hiz"/> <pin name="F" x="-17.78" y="-2.54" length="middle" direction="hiz"/> <pin name="B" x="-17.78" y="-5.08" length="middle" direction="in"/>- <pin name="ENABLE B" x="-17.78" y="-7.62" length="middle" direction="in"/>+ <pin name="ENABLE_B" x="-17.78" y="-7.62" length="middle" direction="in"/> <pin name="VSS" x="-17.78" y="-10.16" length="middle" direction="pwr"/> <pin name="VDD" x="17.78" y="7.62" length="middle" direction="pwr" rot="R180"/>- <pin name="ENABLE D" x="17.78" y="5.08" length="middle" direction="in" rot="R180"/>+ <pin name="ENABLE_D" x="17.78" y="5.08" length="middle" direction="in" rot="R180"/> <pin name="D" x="17.78" y="2.54" length="middle" direction="in" rot="R180"/> <pin name="H" x="17.78" y="0" length="middle" direction="hiz" rot="R180"/> <pin name="NC" x="17.78" y="-2.54" length="middle" direction="io" rot="R180"/> <pin name="G" x="17.78" y="-5.08" length="middle" direction="hiz" rot="R180"/> <pin name="C" x="17.78" y="-7.62" length="middle" direction="in" rot="R180"/>- <pin name="ENABLE C" x="17.78" y="-10.16" length="middle" direction="in" rot="R180"/>+ <pin name="ENABLE_C" x="17.78" y="-10.16" length="middle" direction="in" rot="R180"/> </symbol> </symbols> <devicesets>@@ -112,23 +124,30 @@ <device name="" package="CD40109BPWR"> <connects> <connect gate="G$1" pin="VCC" pad="1"/>- <connect gate="G$1" pin="ENABLE A" pad="2"/>+ <connect gate="G$1" pin="ENABLE_A" pad="2"/> <connect gate="G$1" pin="A" pad="3"/> <connect gate="G$1" pin="E" pad="4"/> <connect gate="G$1" pin="F" pad="5"/> <connect gate="G$1" pin="B" pad="6"/>- <connect gate="G$1" pin="ENABLE B" pad="7"/>+ <connect gate="G$1" pin="ENABLE_B" pad="7"/> <connect gate="G$1" pin="VSS" pad="8"/> <connect gate="G$1" pin="VDD" pad="16"/>- <connect gate="G$1" pin="ENABLE D" pad="15"/>+ <connect gate="G$1" pin="ENABLE_D" pad="15"/> <connect gate="G$1" pin="D" pad="14"/> <connect gate="G$1" pin="H" pad="13"/> <connect gate="G$1" pin="NC" pad="12"/> <connect gate="G$1" pin="G" pad="11"/> <connect gate="G$1" pin="C" pad="10"/>- <connect gate="G$1" pin="ENABLE C" pad="9"/>+ <connect gate="G$1" pin="ENABLE_C" pad="9"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="CD40109BPWR" constant="no"/>+ <attribute name="MANUFACTURER" value="Texas Instruments" constant="no"/>+ <attribute name="DIGIKEY_PN" value="296-12163-2-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C131950" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>
page.json+13−10@@ -26,19 +26,22 @@ "model_3d_step": "cd40109bpwr.step", "lbr": "cd40109bpwr.lbr" },- "distributor_links": {},+ "distributor_links": {+ "digikey": "296-12163-2-ND",+ "lcsc": "C131950"+ }, "pins": [ { "number": "1", "name": "VCC", "type": "power_in",- "description": "Low-voltage supply for the input logic side. Recommended 3-18V; must be ≤ VDD in normal use (mode VCC > VDD is allowed for high-to-low shifting)."+ "description": "Low-voltage supply for the input logic side. Recommended 3-18V; must be \u2264 VDD in normal use (mode VCC > VDD is allowed for high-to-low shifting)." }, { "number": "2", "name": "ENABLE A", "type": "input",- "description": "Three-state enable for channel A→E output. Logic 1 (=VCC) enables the output; logic 0 (=VSS) places output E in high-impedance state."+ "description": "Three-state enable for channel A\u2192E output. Logic 1 (=VCC) enables the output; logic 0 (=VSS) places output E in high-impedance state." }, { "number": "3",@@ -50,13 +53,13 @@ "number": "4", "name": "E", "type": "tri_state",- "description": "High-voltage three-state logic output for channel A→E. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE A = 0."+ "description": "High-voltage three-state logic output for channel A\u2192E. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE A = 0." }, { "number": "5", "name": "F", "type": "tri_state",- "description": "High-voltage three-state logic output for channel B→F. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE B = 0."+ "description": "High-voltage three-state logic output for channel B\u2192F. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE B = 0." }, { "number": "6",@@ -68,7 +71,7 @@ "number": "7", "name": "ENABLE B", "type": "input",- "description": "Three-state enable for channel B→F output. Logic 1 = VCC enables the output; logic 0 places output F in high-impedance state."+ "description": "Three-state enable for channel B\u2192F output. Logic 1 = VCC enables the output; logic 0 places output F in high-impedance state." }, { "number": "8",@@ -80,7 +83,7 @@ "number": "9", "name": "ENABLE C", "type": "input",- "description": "Three-state enable for channel C→G output. Logic 1 = VCC enables the output; logic 0 places output G in high-impedance state."+ "description": "Three-state enable for channel C\u2192G output. Logic 1 = VCC enables the output; logic 0 places output G in high-impedance state." }, { "number": "10",@@ -92,7 +95,7 @@ "number": "11", "name": "G", "type": "tri_state",- "description": "High-voltage three-state logic output for channel C→G. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE C = 0."+ "description": "High-voltage three-state logic output for channel C\u2192G. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE C = 0." }, { "number": "12",@@ -104,7 +107,7 @@ "number": "13", "name": "H", "type": "tri_state",- "description": "High-voltage three-state logic output for channel D→H. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE D = 0."+ "description": "High-voltage three-state logic output for channel D\u2192H. Logic 1 = VDD, logic 0 = VSS; high-Z when ENABLE D = 0." }, { "number": "14",@@ -116,7 +119,7 @@ "number": "15", "name": "ENABLE D", "type": "input",- "description": "Three-state enable for channel D→H output. Logic 1 = VCC enables the output; logic 0 places output H in high-impedance state."+ "description": "Three-state enable for channel D\u2192H output. Logic 1 = VCC enables the output; logic 0 places output H in high-impedance state." }, { "number": "16",