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CD40103BPW
Public Made by Adomby adom
Texas Instruments Counters, Dividers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+52@@ -0,0 +1,52 @@+# CD40103BPW++**Texas Instruments** · Counters, Dividers · TSSOP-16++CD40103BPW from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CLOCK | input | Clock input; the counter decrements on each positive clock transition, with a maximum clock input frequency of 0.7 MHz at 5 V (min), 1.8 MHz at 10 V, and 2.4 MHz at 15 V. |+| 2 | CLR | input | Active-low asynchronous clear; when low the counter is cleared to its maximum count (255 for the CD40103B) regardless of the other inputs. |+| 3 | CI/CE | input | Active-low carry-in/counter enable; counting is inhibited when this input is high, and it is used to cascade counters. |+| 4 | J0 | input | Jam (preset) data input J0, the least significant bit of the 8-bit binary word for the CD40103B. |+| 5 | J1 | input | Jam (preset) data input J1 for the CD40103B 8-bit binary word. |+| 6 | J2 | input | Jam (preset) data input J2 for the CD40103B 8-bit binary word. |+| 7 | J3 | input | Jam (preset) data input J3 for the CD40103B 8-bit binary word. |+| 8 | VSS | power_in | Ground (VSS) supply terminal; the supply voltage VDD is referenced to it. |+| 9 | APE | input | Active-low asynchronous preset enable; when low, the JAM data is forced asynchronously into the counter regardless of SPE, CI/CE or CLOCK. |+| 10 | J4 | input | Jam (preset) data input J4 for the CD40103B 8-bit binary word. |+| 11 | J5 | input | Jam (preset) data input J5 for the CD40103B 8-bit binary word. |+| 12 | J6 | input | Jam (preset) data input J6 for the CD40103B 8-bit binary word. |+| 13 | J7 | input | Jam (preset) data input J7, the most significant bit of the CD40103B 8-bit binary word. |+| 14 | CO/ZD | output | Active-low carry-out/zero-detect output; goes low when the count reaches zero while CI/CE is low and stays low for one full clock period. |+| 15 | SPE | input | Active-low synchronous preset enable; when low, the JAM data is clocked into the counter on the next positive clock transition. |+| 16 | VDD | power_in | Positive supply voltage; recommended range is 3 V to 18 V, and the absolute maximum is -0.5 V to +20 V referenced to VSS. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CD40103BPW`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)+- 3D model files: `cd40103bpw-etched.step` / `cd40103bpw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd40103bpw.step` / `cd40103bpw.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd40103b.pdf) (21 pp, sha256 `1a982876aec1d075`, retrieved 2026-10-07, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd40103bpw-datasheet.pdf)
page.jsonadded+248@@ -0,0 +1,248 @@+{+ "slug": "cd40103bpw",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Counters, Dividers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd40103bpw",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd40103bpw.kicad_sym",+ "cd40103bpw.kicad_mod",+ "cd40103bpw.glb",+ "cd40103bpw.step",+ "cd40103bpw.lbr",+ "docs/hero.png",+ "docs/cd40103bpw-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "cd40103bpw-hero.glb",+ "cd40103bpw-hero.overlay.json"+ ],+ "component": {+ "mpn": "CD40103BPW",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Counters, Dividers",+ "datasheet": "https://www.ti.com/lit/ds/symlink/cd40103b.pdf",+ "parts": {+ "symbol": "cd40103bpw.kicad_sym",+ "footprint": "cd40103bpw.kicad_mod",+ "model_3d": "cd40103bpw-hero.glb",+ "model_3d_plain": "cd40103bpw.glb",+ "model_3d_step": "cd40103bpw-etched.step",+ "model_3d_step_plain": "cd40103bpw.step",+ "lbr": "cd40103bpw.lbr"+ },+ "distributor_links": {+ "lcsc": "C1547971",+ "digikey": "296-32857-5-ND",+ "mouser": "595-CD40103BPW"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T07:44:34Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-32857-5-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-CD40103BPW",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "CLOCK",+ "type": "input",+ "description": "Clock input; the counter decrements on each positive clock transition, with a maximum clock input frequency of 0.7 MHz at 5 V (min), 1.8 MHz at 10 V, and 2.4 MHz at 15 V."+ },+ {+ "number": "2",+ "name": "CLR",+ "type": "input",+ "description": "Active-low asynchronous clear; when low the counter is cleared to its maximum count (255 for the CD40103B) regardless of the other inputs."+ },+ {+ "number": "3",+ "name": "CI/CE",+ "type": "input",+ "description": "Active-low carry-in/counter enable; counting is inhibited when this input is high, and it is used to cascade counters."+ },+ {+ "number": "4",+ "name": "J0",+ "type": "input",+ "description": "Jam (preset) data input J0, the least significant bit of the 8-bit binary word for the CD40103B."+ },+ {+ "number": "5",+ "name": "J1",+ "type": "input",+ "description": "Jam (preset) data input J1 for the CD40103B 8-bit binary word."+ },+ {+ "number": "6",+ "name": "J2",+ "type": "input",+ "description": "Jam (preset) data input J2 for the CD40103B 8-bit binary word."+ },+ {+ "number": "7",+ "name": "J3",+ "type": "input",+ "description": "Jam (preset) data input J3 for the CD40103B 8-bit binary word."+ },+ {+ "number": "8",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground (VSS) supply terminal; the supply voltage VDD is referenced to it."+ },+ {+ "number": "9",+ "name": "APE",+ "type": "input",+ "description": "Active-low asynchronous preset enable; when low, the JAM data is forced asynchronously into the counter regardless of SPE, CI/CE or CLOCK."+ },+ {+ "number": "10",+ "name": "J4",+ "type": "input",+ "description": "Jam (preset) data input J4 for the CD40103B 8-bit binary word."+ },+ {+ "number": "11",+ "name": "J5",+ "type": "input",+ "description": "Jam (preset) data input J5 for the CD40103B 8-bit binary word."+ },+ {+ "number": "12",+ "name": "J6",+ "type": "input",+ "description": "Jam (preset) data input J6 for the CD40103B 8-bit binary word."+ },+ {+ "number": "13",+ "name": "J7",+ "type": "input",+ "description": "Jam (preset) data input J7, the most significant bit of the CD40103B 8-bit binary word."+ },+ {+ "number": "14",+ "name": "CO/ZD",+ "type": "output",+ "description": "Active-low carry-out/zero-detect output; goes low when the count reaches zero while CI/CE is low and stays low for one full clock period."+ },+ {+ "number": "15",+ "name": "SPE",+ "type": "input",+ "description": "Active-low synchronous preset enable; when low, the JAM data is clocked into the counter on the next positive clock transition."+ },+ {+ "number": "16",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply voltage; recommended range is 3 V to 18 V, and the absolute maximum is -0.5 V to +20 V referenced to VSS."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-sonnet-5-5",+ "primary_mode": "vision",+ "consensus_model": "claude-opus-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The only terminal assignment I read is the shared CD40102B/CD40103B top-view diagram on page 6, whic",+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 12,+ "cost_usd": 0.3973,+ "at": "2026-10-07T07:44:19"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/cd40103b.pdf",+ "pages": 21,+ "sha256": "1a982876aec1d075",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "cd40103bpw.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "cd40103bpw-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "8f66bae46d37532eabc7897d966052652b8e46fee6d1c576407721cf7824be76",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}