component
CD4001BPWR
Public Made by Adomby adom
Texas Instruments Logic Gates, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
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README.mdadded+50@@ -0,0 +1,50 @@+# CD4001BPWR++**Texas Instruments** · Logic Gates · TSSOP-14++CD4001BPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A | input | Input A to the first 2-input NOR gate; its NOR combination with input B (pin 2) drives output J at pin 3. |+| 2 | B | input | Input B to the first 2-input NOR gate; its NOR combination with input A (pin 1) drives output J at pin 3. |+| 3 | J | output | Output of the first NOR gate, J = NOR(A, B) where A and B are pins 1 and 2. |+| 4 | K | output | Output of the second NOR gate, K = NOR(C, D) where C and D are pins 5 and 6. |+| 5 | C | input | Input C to the second 2-input NOR gate; its NOR combination with input D (pin 6) drives output K at pin 4. |+| 6 | D | input | Input D to the second 2-input NOR gate; its NOR combination with input C (pin 5) drives output K at pin 4. |+| 7 | VSS | power_in | Negative supply / ground reference for the device, with DC supply voltage range of -0.5V to +20V referenced to this terminal per absolute maximum ratings. |+| 8 | E | input | Input E to the third 2-input NOR gate; its NOR combination with input F (pin 9) drives output L at pin 10. |+| 9 | F | input | Input F to the third 2-input NOR gate; its NOR combination with input E (pin 8) drives output L at pin 10. |+| 10 | L | output | Output of the third NOR gate, L = NOR(E, F) where E and F are pins 8 and 9. |+| 11 | M | output | Output of the fourth NOR gate, M = NOR(G, H) where G and H are pins 12 and 13. |+| 12 | G | input | Input G to the fourth 2-input NOR gate; its NOR combination with input H (pin 13) drives output M at pin 11. |+| 13 | H | input | Input H to the fourth 2-input NOR gate; its NOR combination with input G (pin 12) drives output M at pin 11. |+| 14 | VDD | power_in | Positive supply voltage input, recommended operating range 3V to 18V (absolute maximum -0.5V to +20V referenced to VSS). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-14 |+| Category | Logic |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `CD4001BPWR`+- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`+- 3D model: TSSOP-14 (KiCad packages3D, STEP)+- 3D model files: `cd4001bpwr-etched.step` / `cd4001bpwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd4001bpwr.step` / `cd4001bpwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cd4001b.pdf) (23 pp, sha256 `29898c1b5c0da39b`, retrieved 2026-09-23, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-sonnet-5` (text+vision), consensus `claude-opus-4-8` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd4001bpwr-datasheet.pdf)
page.jsonadded+179@@ -0,0 +1,179 @@+{+ "slug": "cd4001bpwr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Logic Gates, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd4001bpwr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd4001bpwr.kicad_sym",+ "cd4001bpwr.kicad_mod",+ "cd4001bpwr.glb",+ "cd4001bpwr.step",+ "cd4001bpwr.lbr",+ "docs/hero.png",+ "docs/cd4001bpwr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "CD4001BPWR",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-14",+ "pin_count": 14,+ "category": "Logic",+ "subcategory": "Logic Gates",+ "datasheet": "https://www.ti.com/lit/ds/symlink/cd4001b.pdf",+ "parts": {+ "symbol": "cd4001bpwr.kicad_sym",+ "footprint": "cd4001bpwr.kicad_mod",+ "model_3d": "cd4001bpwr-etched.glb",+ "model_3d_plain": "cd4001bpwr.glb",+ "model_3d_step": "cd4001bpwr-etched.step",+ "model_3d_step_plain": "cd4001bpwr.step",+ "lbr": "cd4001bpwr.lbr"+ },+ "distributor_links": {+ "lcsc": "C496116"+ },+ "pins": [+ {+ "number": "1",+ "name": "A",+ "type": "input",+ "description": "Input A to the first 2-input NOR gate; its NOR combination with input B (pin 2) drives output J at pin 3."+ },+ {+ "number": "2",+ "name": "B",+ "type": "input",+ "description": "Input B to the first 2-input NOR gate; its NOR combination with input A (pin 1) drives output J at pin 3."+ },+ {+ "number": "3",+ "name": "J",+ "type": "output",+ "description": "Output of the first NOR gate, J = NOR(A, B) where A and B are pins 1 and 2."+ },+ {+ "number": "4",+ "name": "K",+ "type": "output",+ "description": "Output of the second NOR gate, K = NOR(C, D) where C and D are pins 5 and 6."+ },+ {+ "number": "5",+ "name": "C",+ "type": "input",+ "description": "Input C to the second 2-input NOR gate; its NOR combination with input D (pin 6) drives output K at pin 4."+ },+ {+ "number": "6",+ "name": "D",+ "type": "input",+ "description": "Input D to the second 2-input NOR gate; its NOR combination with input C (pin 5) drives output K at pin 4."+ },+ {+ "number": "7",+ "name": "VSS",+ "type": "power_in",+ "description": "Negative supply / ground reference for the device, with DC supply voltage range of -0.5V to +20V referenced to this terminal per absolute maximum ratings."+ },+ {+ "number": "8",+ "name": "E",+ "type": "input",+ "description": "Input E to the third 2-input NOR gate; its NOR combination with input F (pin 9) drives output L at pin 10."+ },+ {+ "number": "9",+ "name": "F",+ "type": "input",+ "description": "Input F to the third 2-input NOR gate; its NOR combination with input E (pin 8) drives output L at pin 10."+ },+ {+ "number": "10",+ "name": "L",+ "type": "output",+ "description": "Output of the third NOR gate, L = NOR(E, F) where E and F are pins 8 and 9."+ },+ {+ "number": "11",+ "name": "M",+ "type": "output",+ "description": "Output of the fourth NOR gate, M = NOR(G, H) where G and H are pins 12 and 13."+ },+ {+ "number": "12",+ "name": "G",+ "type": "input",+ "description": "Input G to the fourth 2-input NOR gate; its NOR combination with input H (pin 13) drives output M at pin 11."+ },+ {+ "number": "13",+ "name": "H",+ "type": "input",+ "description": "Input H to the fourth 2-input NOR gate; its NOR combination with input G (pin 12) drives output M at pin 11."+ },+ {+ "number": "14",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply voltage input, recommended operating range 3V to 18V (absolute maximum -0.5V to +20V referenced to VSS)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-sonnet-5",+ "primary_mode": "text+vision",+ "consensus_model": "claude-opus-4-8",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 23,+ "cost_usd": 0.7179,+ "at": "2026-09-23T23:49:15"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/cd4001b.pdf",+ "pages": 23,+ "sha256": "29898c1b5c0da39b",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 14,+ "described": 14,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}