ca-is3720hg

@@ -0,0 +1,53 @@+# CA-IS3720HG++**Chipanalog** · Digital Isolators · SOIC-8-300mil++CA-IS3720HG from Chipanalog, in a SOIC-8-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDDA | power_in | A-side supply voltage. Operating range 2.375 V to 5.5 V (typ 3.3 V/5 V). Decouple to GNDA with a low-ESR ceramic capacitor placed close to the pin. |+| 2 | VI1 | input | A-side logic input for channel 1. Schmitt-trigger CMOS input (VIT+ typ 1.67 V, VIT- typ 1.23 V, hysteresis typ 0.44 V). Signal is transmitted across the isolation barrier to VO1 on the B side. |+| 3 | VI2 | input | A-side logic input for channel 2. Schmitt-trigger CMOS input (same thresholds as VI1). Signal is transmitted across the isolation barrier to VO2 on the B side. |+| 4 | GNDA | power_in | A-side ground reference. All A-side voltages (VDDA, VI1, VI2) are referenced to this pin. Isolated from GNDB by the internal SiO2 barrier. |+| 5 | GNDB | power_in | B-side ground reference. All B-side voltages (VDDB, VO1, VO2) are referenced to this pin. Isolated from GNDA by the internal SiO2 barrier. |+| 6 | VO2 | output | B-side logic output for channel 2. Reconstructed CMOS copy of VI2. Drives VDDO−0.4 V high / 0.4 V low at ±4 mA (5 V supply). Output impedance ~50 Ω. Defaults HIGH on loss of input power or signal (H-suffix fail-safe). |+| 7 | VO1 | output | B-side logic output for channel 1. Reconstructed CMOS copy of VI1. Drives VDDO−0.4 V high / 0.4 V low at ±4 mA (5 V supply). Output impedance ~50 Ω. Defaults HIGH on loss of input power or signal (H-suffix fail-safe). |+| 8 | VDDB | power_in | B-side supply voltage. Operating range 2.375 V to 5.5 V; sets the CMOS output swing on VO1/VO2. Decouple to GNDB with a low-ESR ceramic capacitor placed close to the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Chipanalog |+| Package | SOIC-8-300mil |+| Category | Comm/UART |+| Pins | 8 |++## Ordering variants++- `CA-IS3720HG`+- `CA-IS3720HGLG`+- `CA-IS3720HGHS`+- `CA-IS3720HGLS`+- `CA-IS3720HGHW`+- `CA-IS3720HGLW`++## CAD (KiCad official)++- Symbol: `CA-IS3720HG`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8-300mil (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Chipanalog datasheet](docs/ca-is3720hg-datasheet.pdf) (None pp, sha256 `e0570f476c6a89dd`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ca-is3720hg-datasheet.pdf)

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