CA-IS3620LW

@@ -0,0 +1,58 @@+# CA-IS3620LW++**Chipanalog** · Digital Isolators (With Power) · SOIC-16-300mil++CA-IS3620LW from Chipanalog, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD | power_in | A-side (primary) supply, 3 V-5.5 V. Powers the internal DC-DC converter primary side; for CA-IS36xxW parts this pin also sets the A-side input threshold and output level. Bypass with 0.1 µF and 10 µF placed within 2 mm of the pin. |+| 2 | GNDA | power_in | A-side (primary) ground reference. |+| 3 | VI1 | input | A-side logic input for channel 1 (forward channel, drives VO1 on the B side). |+| 4 | VI2 | input | A-side logic input for channel 2 (forward channel, drives VO2 on the B side). Pin is labelled VI2/VO2 in the datasheet; on CA-IS3620 this is an A-side input. |+| 5 | NC | unconnected | No internal connection. |+| 6 | NC | unconnected | No internal connection. |+| 7 | NC | unconnected | No connection on CA-IS3620LW (per ordering table 4-1, PIN7 function = NC for the LW suffix). On the CA-IS3621 this same pin is the A-side output enable (ENA). |+| 8 | GNDA | power_in | A-side (primary) ground reference (second GNDA pin). |+| 9 | GNDB | power_in | B-side (secondary, isolated) ground reference. |+| 10 | NC | unconnected | No internal connection on the CA-IS362x variant (this pin is the SEL input on the CA-IS364x variant). |+| 11 | SEL | input | VISO output-voltage select. Tie SEL to VISO for VISO = 5 V; tie SEL to GNDB or leave it floating for VISO = 3.3 V. Referenced to the B-side ground. |+| 12 | NC | unconnected | No internal connection. |+| 13 | VO2 | output | B-side logic output for channel 2 (mirrors VI2 across the isolation barrier). Pin is labelled VI2/VO2 in the datasheet; on CA-IS3620 this is a B-side output. Default state low if the input is lost (LW suffix). |+| 14 | VO1 | output | B-side logic output for channel 1 (mirrors VI1 across the isolation barrier). Default state low if the input is lost (LW suffix). |+| 15 | GNDB | power_in | B-side (secondary, isolated) ground reference (second GNDB pin). |+| 16 | VISO | power_out | Isolated output voltage generated by the internal DC-DC converter; 3.3 V or 5 V selected by the SEL pin. Up to 650 mW output power. Bypass with 0.1 µF and 10 µF placed within 2 mm of the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Chipanalog |+| Package | SOIC-16-300mil |+| Category | Signal Isolation Devices |+| Pins | 16 |++## Ordering variants++Same part, different packaging or reel option.++- `CA-IS3620LW`++## CAD (KiCad official)++- Symbol: `CA-IS3620LW`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16-300mil (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Chipanalog datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590902895057719296) (39 pp, sha256 `f85856d0a6d6271d`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ca-is3620lw-datasheet.pdf)

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