component
CA-IS3620LW
Public Made by Adomby adom
Chipanalog Digital Isolators (With Power), SOIC-16-300mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+170−8@@ -1,13 +1,180 @@ {+ "schema_version": 1,+ "type": "component", "slug": "ca-is3620lw",+ "title": "CA-IS3620LW",+ "brief": "Chipanalog Digital Isolators (With Power), SOIC-16-300mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Chipanalog Digital Isolators (With Power), SOIC-16-300mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "signal isolation devices", "ca-is3620lw" ],+ "component": {+ "mpn": "CA-IS3620LW",+ "manufacturer": "Chipanalog",+ "package": "SOIC-16-300mil",+ "pin_count": 16,+ "category": "Signal Isolation Devices",+ "subcategory": "Digital Isolators (With Power)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590902895057719296",+ "parts": {+ "symbol": "ca-is3620lw.kicad_sym",+ "footprint": "ca-is3620lw.kicad_mod",+ "model_3d": "ca-is3620lw.glb",+ "model_3d_step": "ca-is3620lw.step",+ "lbr": "ca-is3620lw.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "VDD",+ "type": "power_in",+ "description": "A-side (primary) supply, 3 V-5.5 V. Powers the internal DC-DC converter primary side; for CA-IS36xxW parts this pin also sets the A-side input threshold and output level. Bypass with 0.1 \u00b5F and 10 \u00b5F placed within 2 mm of the pin."+ },+ {+ "number": "2",+ "name": "GNDA",+ "type": "power_in",+ "description": "A-side (primary) ground reference."+ },+ {+ "number": "3",+ "name": "VI1",+ "type": "input",+ "description": "A-side logic input for channel 1 (forward channel, drives VO1 on the B side)."+ },+ {+ "number": "4",+ "name": "VI2",+ "type": "input",+ "description": "A-side logic input for channel 2 (forward channel, drives VO2 on the B side). Pin is labelled VI2/VO2 in the datasheet; on CA-IS3620 this is an A-side input."+ },+ {+ "number": "5",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection."+ },+ {+ "number": "6",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection."+ },+ {+ "number": "7",+ "name": "NC",+ "type": "unconnected",+ "description": "No connection on CA-IS3620LW (per ordering table 4-1, PIN7 function = NC for the LW suffix). On the CA-IS3621 this same pin is the A-side output enable (ENA)."+ },+ {+ "number": "8",+ "name": "GNDA",+ "type": "power_in",+ "description": "A-side (primary) ground reference (second GNDA pin)."+ },+ {+ "number": "9",+ "name": "GNDB",+ "type": "power_in",+ "description": "B-side (secondary, isolated) ground reference."+ },+ {+ "number": "10",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection on the CA-IS362x variant (this pin is the SEL input on the CA-IS364x variant)."+ },+ {+ "number": "11",+ "name": "SEL",+ "type": "input",+ "description": "VISO output-voltage select. Tie SEL to VISO for VISO = 5 V; tie SEL to GNDB or leave it floating for VISO = 3.3 V. Referenced to the B-side ground."+ },+ {+ "number": "12",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection."+ },+ {+ "number": "13",+ "name": "VO2",+ "type": "output",+ "description": "B-side logic output for channel 2 (mirrors VI2 across the isolation barrier). Pin is labelled VI2/VO2 in the datasheet; on CA-IS3620 this is a B-side output. Default state low if the input is lost (LW suffix)."+ },+ {+ "number": "14",+ "name": "VO1",+ "type": "output",+ "description": "B-side logic output for channel 1 (mirrors VI1 across the isolation barrier). Default state low if the input is lost (LW suffix)."+ },+ {+ "number": "15",+ "name": "GNDB",+ "type": "power_in",+ "description": "B-side (secondary, isolated) ground reference (second GNDB pin)."+ },+ {+ "number": "16",+ "name": "VISO",+ "type": "power_out",+ "description": "Isolated output voltage generated by the internal DC-DC converter; 3.3 V or 5 V selected by the SEL pin. Up to 650 mW output power. Bypass with 0.1 \u00b5F and 10 \u00b5F placed within 2 mm of the pin."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590902895057719296",+ "pages": 39,+ "sha256": "f85856d0a6d6271d",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Chipanalog",+ "Package": "SOIC-16-300mil",+ "Category": "Signal Isolation Devices",+ "Pins": "16"+ }+ },+ "variants": [+ {+ "mpn": "CA-IS3620LW",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "ca-is3620lw"+ ],+ "discovery_pitch": "CA-IS3620LW (Chipanalog) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +192,5 @@ "docs/ca-is3620lw-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }