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Initial commit: component/ca-is3211vbg

Ray ·f73123ff70 ·1mo ago
2 files changed +182
README.mdadded+44
@@ -0,0 +1,44 @@+# CA-IS3211VBG++**Chipanalog** · Isolators - Gate Drivers · SOIC-8-300mil++CA-IS3211VBG from Chipanalog, in a SOIC-8-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | NC | unconnected | No connection. |+| 2 | ANODE | input | Analog photodiode anode terminal; accepts 7-16 mA forward current with 1.8-2.4 V forward drop and 7 V reverse blocking rating. |+| 3 | CATHODE | input | Analog photodiode cathode terminal for isolated optical interface. |+| 4 | NC | unconnected | No connection. |+| 5 | VEE | power_in | Negative output stage power rail; typical range −5 to 0 V for IGBT/SiC applications, connects to ground or negative supply. |+| 6 | VOUT | output | Gate driver output; rail-to-rail swing from VEE to VCC with 5 A peak source current and 6 A peak sink current. |+| 7 | NC | unconnected | No connection. |+| 8 | VCC | power_in | Positive output stage power rail; 10-30 V (8 V UVLO) or 14-30 V (12 V UVLO) range with 0.1 µF bypass capacitor to VEE. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Chipanalog |+| Package | SOIC-8-300mil |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `CA-IS3211VBG`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8-300mil (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Chipanalog datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602993936676384768) (24 pp, sha256 `918946d8bd08bd7e`, retrieved 2026-09-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-haiku-4-5-20251001` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ca-is3211vbg-datasheet.pdf)
page.jsonadded+138
@@ -0,0 +1,138 @@+{+  "slug": "ca-is3211vbg",+  "version": "0.1.0",+  "type": "component",+  "description": "Chipanalog Isolators - Gate Drivers, SOIC-8-300mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "ca-is3211vbg",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ca-is3211vbg.kicad_sym",+    "ca-is3211vbg.kicad_mod",+    "ca-is3211vbg.glb",+    "ca-is3211vbg.step",+    "ca-is3211vbg.lbr",+    "docs/hero.png",+    "docs/ca-is3211vbg-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "CA-IS3211VBG",+    "manufacturer": "Chipanalog",+    "package": "SOIC-8-300mil",+    "pin_count": 8,+    "category": "Power Management (PMIC)",+    "subcategory": "Isolators - Gate Drivers",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602993936676384768",+    "parts": {+      "symbol": "ca-is3211vbg.kicad_sym",+      "footprint": "ca-is3211vbg.kicad_mod",+      "model_3d": "ca-is3211vbg.glb",+      "model_3d_step": "ca-is3211vbg.step",+      "lbr": "ca-is3211vbg.lbr"+    },+    "distributor_links": {+      "lcsc": "C7422540"+    },+    "pins": [+      {+        "number": "1",+        "name": "NC",+        "type": "unconnected",+        "description": "No connection."+      },+      {+        "number": "2",+        "name": "ANODE",+        "type": "input",+        "description": "Analog photodiode anode terminal; accepts 7-16 mA forward current with 1.8-2.4 V forward drop and 7 V reverse blocking rating."+      },+      {+        "number": "3",+        "name": "CATHODE",+        "type": "input",+        "description": "Analog photodiode cathode terminal for isolated optical interface."+      },+      {+        "number": "4",+        "name": "NC",+        "type": "unconnected",+        "description": "No connection."+      },+      {+        "number": "5",+        "name": "VEE",+        "type": "power_in",+        "description": "Negative output stage power rail; typical range −5 to 0 V for IGBT/SiC applications, connects to ground or negative supply."+      },+      {+        "number": "6",+        "name": "VOUT",+        "type": "output",+        "description": "Gate driver output; rail-to-rail swing from VEE to VCC with 5 A peak source current and 6 A peak sink current."+      },+      {+        "number": "7",+        "name": "NC",+        "type": "unconnected",+        "description": "No connection."+      },+      {+        "number": "8",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive output stage power rail; 10-30 V (8 V UVLO) or 14-30 V (12 V UVLO) range with 0.1 µF bypass capacitor to VEE."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-haiku-4-5-20251001",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 24,+        "cost_usd": 0.2132,+        "at": "2026-09-17T16:06:20"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602993936676384768",+        "pages": 24,+        "sha256": "918946d8bd08bd7e",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file