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Initial commit: component/ca-is3050g

Ray ·7bb1259e4d ·
2 files changed +86
README.mdadded+52
@@ -0,0 +1,52 @@+# CA-IS3050G++**Chipanalog** · CAN Controllers · SOIC-8-300mil++CA-IS3050G from Chipanalog, in a SOIC-8-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC1 | power_in | Power supply input for the logic side (2.5-5.5 V). Bypass VCC1 to GND1 with a 0.1 µF capacitor as close to the device as possible. |+| 2 | RXD | output | Receiver output (logic side, digital). RXD is high when the bus is in the recessive state and low when the bus is in the dominant state. Output current is ±4 mA. |+| 3 | TXD | input | Driver data input (logic side, digital). When TXD is low, CANH/CANL are driven to the dominant state; when TXD is high, the driver is off and the bus is left in the recessive state. |+| 4 | GND1 | power_in | Logic-side ground reference for VCC1, TXD, and RXD. |+| 5 | GND2 | power_in | Bus-side ground reference for VCC2, CANH, and CANL. Isolated from GND1 by the SiO2 isolation barrier. |+| 6 | CANL | bidirectional | Low-level CAN differential bus line. ±58 V fault tolerant with ±30 V extended common-mode input range. |+| 7 | CANH | bidirectional | High-level CAN differential bus line. ±58 V fault tolerant with ±30 V extended common-mode input range. |+| 8 | VCC2 | power_in | Power supply input for the bus side (4.5-5.5 V). Bypass VCC2 to GND2 with a 0.1 µF capacitor as close to the device as possible. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Chipanalog |+| Package | SOIC-8-300mil |+| Category | Interface |+| Pins | 8 |++## Ordering variants++Same part, different packaging or reel option.++- `CA-IS3050GG`+- `CA-IS3050GW`+- `CA-IS3050GU`+- `CA-IS3050GWG`++## CAD (KiCad official)++- Symbol: `CA-IS3050G`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8-300mil (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Chipanalog datasheet](docs/ca-is3050g-datasheet.pdf) (25 pp, sha256 `202103ff414ec669`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ca-is3050g-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "ca-is3050g",+  "version": "0.1.0",+  "type": "component",+  "description": "Chipanalog CAN Controllers, SOIC-8-300mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "interface",+    "ca-is3050g"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ca-is3050g.kicad_sym",+    "ca-is3050g.kicad_mod",+    "ca-is3050g.glb",+    "ca-is3050g.step",+    "ca-is3050g.lbr",+    "docs/hero.png",+    "docs/ca-is3050g-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file