CA-IF4820HS

@@ -0,0 +1,49 @@+# CA-IF4820HS++**Chipanalog** · RS-485 / RS-422 ICs · SOIC-8++CA-IF4820HS from Chipanalog, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | RO | output | Receiver bus output. Digital CMOS output that presents the recovered logic level from the differential A/B bus to the host controller when the receiver is enabled (REB=0). |+| 2 | REB | input | Receiver enable, active-low. Drive REB low to enable the receiver output (RO); drive REB high to place RO in high-impedance. Digital CMOS input referenced to VCC/GND. |+| 3 | DE | input | Driver enable, active-high. Drive DE high to enable the differential driver onto the A/B bus; drive DE low to place the driver outputs in high-impedance (allowing multipoint bus sharing). |+| 4 | DI | input | Driver bus input. Digital CMOS input; the logic level on DI is transmitted as the differential state on A/B when DE is asserted. |+| 5 | GND | power_in | Device ground reference for logic and bus circuitry. |+| 6 | A | bidirectional | Non-inverting RS-485/RS-422 bus line. Serves as the driver's non-inverting output when DE=1 and as the receiver's non-inverting input when REB=0. ±15V common-mode range; ±30V fault protection; ±30kV HBM ESD. |+| 7 | B | bidirectional | Inverting RS-485/RS-422 bus line. Serves as the driver's inverting output when DE=1 and as the receiver's inverting input when REB=0. ±15V common-mode range; ±30V fault protection; ±30kV HBM ESD. |+| 8 | VCC | power_in | Supply voltage input, 3.0V to 5.5V. Bypass to GND with a local decoupling capacitor. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Chipanalog |+| Package | SOIC-8 |+| Category | Interface |+| Pins | 8 |++## Ordering variants++- `CA-IF4820HSHS`+- `CA-IF4820HSHM`+- `CA-IF4820HSHD`++## CAD (KiCad official)++- Symbol: `CA-IF4820HS`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Chipanalog datasheet](docs/ca-if4820hs-datasheet.pdf) (21 pp, sha256 `c063fe96e2b8699c`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ca-if4820hs-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "ca-if4820hs",+  "version": "0.1.0",+  "type": "component",+  "description": "Chipanalog RS-485 / RS-422 ICs, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "interface",+    "ca-if4820hs"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ca-if4820hs.kicad_sym",+    "ca-if4820hs.kicad_mod",+    "ca-if4820hs.glb",+    "ca-if4820hs.step",+    "ca-if4820hs.lbr",+    "docs/hero.png",+    "docs/ca-if4820hs-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file