component
CA-IF4820HS
Public Made by Adomby adom
Chipanalog RS-485 / RS-422 ICs, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+116−8@@ -1,13 +1,126 @@ {+ "schema_version": 1,+ "type": "component", "slug": "ca-if4820hs",+ "title": "CA-IF4820HS",+ "brief": "Chipanalog RS-485 / RS-422 ICs, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Chipanalog RS-485 / RS-422 ICs, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "interface", "ca-if4820hs" ],+ "component": {+ "mpn": "CA-IF4820HS",+ "manufacturer": "Chipanalog",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Interface",+ "subcategory": "RS-485 / RS-422 ICs",+ "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/6dd14e0b105fe2b3868ddaf42150e021.pdf",+ "parts": {+ "symbol": "ca-if4820hs.kicad_sym",+ "footprint": "ca-if4820hs.kicad_mod",+ "model_3d": "ca-if4820hs.glb",+ "model_3d_step": "ca-if4820hs.step",+ "lbr": "ca-if4820hs.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "RO",+ "type": "output",+ "description": "Receiver bus output. Digital CMOS output that presents the recovered logic level from the differential A/B bus to the host controller when the receiver is enabled (REB=0)."+ },+ {+ "number": "2",+ "name": "REB",+ "type": "input",+ "description": "Receiver enable, active-low. Drive REB low to enable the receiver output (RO); drive REB high to place RO in high-impedance. Digital CMOS input referenced to VCC/GND."+ },+ {+ "number": "3",+ "name": "DE",+ "type": "input",+ "description": "Driver enable, active-high. Drive DE high to enable the differential driver onto the A/B bus; drive DE low to place the driver outputs in high-impedance (allowing multipoint bus sharing)."+ },+ {+ "number": "4",+ "name": "DI",+ "type": "input",+ "description": "Driver bus input. Digital CMOS input; the logic level on DI is transmitted as the differential state on A/B when DE is asserted."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground reference for logic and bus circuitry."+ },+ {+ "number": "6",+ "name": "A",+ "type": "bidirectional",+ "description": "Non-inverting RS-485/RS-422 bus line. Serves as the driver's non-inverting output when DE=1 and as the receiver's non-inverting input when REB=0. \u00b115V common-mode range; \u00b130V fault protection; \u00b130kV HBM ESD."+ },+ {+ "number": "7",+ "name": "B",+ "type": "bidirectional",+ "description": "Inverting RS-485/RS-422 bus line. Serves as the driver's inverting output when DE=1 and as the receiver's inverting input when REB=0. \u00b115V common-mode range; \u00b130V fault protection; \u00b130kV HBM ESD."+ },+ {+ "number": "8",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage input, 3.0V to 5.5V. Bypass to GND with a local decoupling capacitor."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://datasheet.lcsc.com/datasheet/pdf/6dd14e0b105fe2b3868ddaf42150e021.pdf",+ "pages": 21,+ "sha256": "c063fe96e2b8699c",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Chipanalog",+ "Package": "SOIC-8",+ "Category": "Interface",+ "Pins": "8"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "ca-if4820hs"+ ],+ "discovery_pitch": "CA-IF4820HS (Chipanalog) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +138,5 @@ "docs/ca-if4820hs-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }