← Commit history

Publish 0.2.0

Ray ·69b90d1de4 · ·parent 4869c31
3 files changed +22−8
README.md+14
@@ -38,6 +38,20 @@ CA-IF4820HS from Chipanalog, in a SOIC-8. Pinout and pin descriptions extracted - Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm` - 3D model: SOIC-8 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`ca-if4820hs.step`](ca-if4820hs.step) | 122 KB | You want the bare part, or you mark your own boards. |+| [`ca-if4820hs-etched.step`](ca-if4820hs-etched.step) | 2.2 MB | You want the part with `CA-IF4820HS` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 544 faces against 147 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance  Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1
@@ -1,6 +1,6 @@ {   "slug": "ca-if4820hs",-  "version": "0.1.0",+  "version": "0.2.0",   "type": "component",   "description": "Chipanalog RS-485 / RS-422 ICs, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "tags": [
page.json+7−7
@@ -4,7 +4,7 @@   "slug": "ca-if4820hs",   "title": "CA-IF4820HS",   "brief": "Chipanalog RS-485 / RS-422 ICs, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",-  "version": "0.1.0",+  "version": "0.2.0",   "license": "CC-BY-SA-4.0",   "tags": [     "component",@@ -64,13 +64,13 @@         "number": "6",         "name": "A",         "type": "bidirectional",-        "description": "Non-inverting RS-485/RS-422 bus line. Serves as the driver's non-inverting output when DE=1 and as the receiver's non-inverting input when REB=0. \u00b115V common-mode range; \u00b130V fault protection; \u00b130kV HBM ESD."+        "description": "Non-inverting RS-485/RS-422 bus line. Serves as the driver's non-inverting output when DE=1 and as the receiver's non-inverting input when REB=0. ±15V common-mode range; ±30V fault protection; ±30kV HBM ESD."       },       {         "number": "7",         "name": "B",         "type": "bidirectional",-        "description": "Inverting RS-485/RS-422 bus line. Serves as the driver's inverting output when DE=1 and as the receiver's inverting input when REB=0. \u00b115V common-mode range; \u00b130V fault protection; \u00b130kV HBM ESD."+        "description": "Inverting RS-485/RS-422 bus line. Serves as the driver's inverting output when DE=1 and as the receiver's inverting input when REB=0. ±15V common-mode range; ±30V fault protection; ±30kV HBM ESD."       },       {         "number": "8",@@ -150,9 +150,9 @@     "docs/hero.png",     "docs/ca-if4820hs-datasheet.pdf",     "viewers/symbol.html",-    "viewers/footprint.html"+    "viewers/footprint.html",+    "pads.json"   ],-  "visibility": {-    "public": true-  }+  "visibility": "public",+  "description": "Chipanalog RS-485 / RS-422 ICs, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D." }\ No newline at end of file