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Initial commit: component/ca-if4820fs

Ray ·cc6a070466 ·
2 files changed +84
README.mdadded+50
@@ -0,0 +1,50 @@+# CA-IF4820FS++**Chipanalog** · RS-485/RS-422 ICs · SOIC-8++CA-IF4820FS from Chipanalog, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC | power_in | Supply voltage input, 3.0 V to 5.5 V. Requires at least a 0.1 µF decoupling capacitor between VCC and GND placed close to the pin. |+| 2 | RO | output | Receiver digital output. RO = high when (VA - VB) > VTH+; RO = low when (VA - VB) < VTH-. CMOS logic, VOH ≥ VCC-0.4 V at -4 mA, VOL ≤ 0.4 V at 4 mA. |+| 3 | DI | input | Driver data input. When DI is high, Y outputs high and Z outputs low; when DI is low, Y outputs low and Z outputs high. CMOS logic input. |+| 4 | GND | power_in | Ground reference for the device. |+| 5 | Y | output | RS-485/RS-422 driver non-inverting differential output. Absolute max bus voltage ±30 V, common-mode operating range -7 V to +12 V. |+| 6 | Z | output | RS-485/RS-422 driver inverting differential output. Absolute max bus voltage ±30 V, common-mode operating range -7 V to +12 V. |+| 7 | B | input | RS-485/RS-422 receiver inverting differential input. Absolute max bus voltage ±30 V, common-mode operating range -7 V to +12 V. |+| 8 | A | input | RS-485/RS-422 receiver non-inverting differential input. Absolute max bus voltage ±30 V, common-mode operating range -7 V to +12 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Chipanalog |+| Package | SOIC-8 |+| Category | Comm/UART |+| Pins | 8 |++## Ordering variants++- `CA-IF4820FS`+- `CA-IF4820FSFM`+- `CA-IF4820FSFD`++## CAD (KiCad official)++- Symbol: `CA-IF4820FS`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Chipanalog datasheet](docs/ca-if4820fs-datasheet.pdf) (24 pp, sha256 `2bf29538f533f541`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ca-if4820fs-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "ca-if4820fs",+  "version": "0.1.0",+  "type": "component",+  "description": "Chipanalog RS-485/RS-422 ICs, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "comm-uart",+    "ca-if4820fs"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ca-if4820fs.kicad_sym",+    "ca-if4820fs.kicad_mod",+    "ca-if4820fs.glb",+    "ca-if4820fs.step",+    "ca-if4820fs.lbr",+    "docs/hero.png",+    "docs/ca-if4820fs-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file