component
BTA12-600BRG
Public Made by Adomby adom
STMicroelectronics Thyristors (SCR)/Modules, TO-220AB. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+39@@ -0,0 +1,39 @@+# BTA12-600BRG++**STMicroelectronics** · Thyristors (SCR)/Modules · TO-220AB++BTA12-600BRG from STMicroelectronics, in a TO-220AB. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A1 | passive | Main terminal A1 (reference terminal for the A2 polarity and gate trigger specs); the triac carries 12 A RMS (IT(RMS)) between A2 and A1. |+| 2 | A2 | passive | Main terminal A2, rated for VDRM/VRRM of 600 V (BTA12-600); the insulated tab is rated at 2500 VRMS. |+| 3 | G | input | Gate trigger input; for the BTA12-600B, IGT is 50 mA max and VGT is 1.3 V max (VD = 12 V, RL = 30 Ω), with a peak gate current IGM of 4 A (tp = 20 µs). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | TO-220AB |+| Category | Transistors/Thyristors |+| Pins | 3 |++## CAD (KiCad official)++- Symbol: `BTA12-600BRG`+- Footprint: `Package_TO_SOT_THT:TO-220-3_Vertical`+- 3D model: TO-220AB (KiCad packages3D, STEP)+- 3D model files: `bta12-600brg-etched.step` / `bta12-600brg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bta12-600brg.step` / `bta12-600brg.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886949377949696) (13 pp, sha256 `572e9ae2db745d11`, retrieved 2026-10-03, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/bta12-600brg-datasheet.pdf)
page.jsonadded+131@@ -0,0 +1,131 @@+{+ "slug": "bta12-600brg",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Thyristors (SCR)/Modules, TO-220AB. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "transistors-thyristors",+ "bta12-600brg",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "bta12-600brg.kicad_sym",+ "bta12-600brg.kicad_mod",+ "bta12-600brg.glb",+ "bta12-600brg.step",+ "bta12-600brg.lbr",+ "docs/hero.png",+ "docs/bta12-600brg-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "bta12-600brg-hero.glb",+ "bta12-600brg-hero.overlay.json"+ ],+ "component": {+ "mpn": "BTA12-600BRG",+ "manufacturer": "STMicroelectronics",+ "package": "TO-220AB",+ "pin_count": 3,+ "category": "Transistors/Thyristors",+ "subcategory": "Thyristors (SCR)/Modules",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886949377949696",+ "parts": {+ "symbol": "bta12-600brg.kicad_sym",+ "footprint": "bta12-600brg.kicad_mod",+ "model_3d": "bta12-600brg-hero.glb",+ "model_3d_plain": "bta12-600brg.glb",+ "model_3d_step": "bta12-600brg-etched.step",+ "model_3d_step_plain": "bta12-600brg.step",+ "lbr": "bta12-600brg.lbr"+ },+ "distributor_links": {+ "lcsc": 10063,+ "digikey": "497-2388-5-ND",+ "mouser": "511-BTA12-600B"+ },+ "distributor_check": {+ "checked_at": "2026-10-03T02:27:53Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-2388-5-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-BTA12-600B",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "A1",+ "type": "passive",+ "description": "Main terminal A1 (reference terminal for the A2 polarity and gate trigger specs); the triac carries 12 A RMS (IT(RMS)) between A2 and A1."+ },+ {+ "number": "2",+ "name": "A2",+ "type": "passive",+ "description": "Main terminal A2, rated for VDRM/VRRM of 600 V (BTA12-600); the insulated tab is rated at 2500 VRMS."+ },+ {+ "number": "3",+ "name": "G",+ "type": "input",+ "description": "Gate trigger input; for the BTA12-600B, IGT is 50 mA max and VGT is 1.3 V max (VD = 12 V, RL = 30 Ω), with a peak gate current IGM of 4 A (tp = 20 µs)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-sonnet-5-5",+ "primary_mode": "text+vision",+ "consensus_model": "claude-opus-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The pin labels A1, A2 and G come from the page 1 package picture. The picture shows the lead order b; The pins are typed passive because the main terminals have no ERC class that fits. The datasheet tex; The gate IGT, VGT and IGM limits are quoted from the standard 4-quadrant 'B' column (Table 4) and fr",+ "vision extraction: provenance cannot be text-verified; needs consensus"+ ],+ "pages_sent": 13,+ "cost_usd": 0.3216,+ "at": "2026-10-03T02:27:28"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886949377949696",+ "pages": 13,+ "sha256": "572e9ae2db745d11",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 3,+ "described": 3,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}