component
BQ7692003PWR — TI BQ76920 3–5 Cell Li-Ion Battery Monitor AFE (20-TSSOP)
Public Made by Adomby adom
Texas Instruments BQ76920 (BQ7692003PWR orderable: I²C 0x08, 3.3 V LDO, CRC) 3–5 cell battery-monitor analog front-end, 20-TSSOP. Full component: interactive symbol, footprint, and 3D, with KiCad and Fusion/EAGLE exports.
← Commit history
BQ7692003PWR: validated Fusion/EAGLE library + adom-lbr hub, generated from this page's KiCad sources
2 files changed
+683
BQ7692003PWR.adom-lbr.jsonadded+525@@ -0,0 +1,525 @@+{+ "schema_version": 2,+ "mpn": "BQ7692003PWR",+ "manufacturer": "",+ "package": "",+ "value": "",+ "category": "",+ "symbol": {+ "name": "BQ7692003",+ "pins": [+ {+ "number": "6",+ "name": "TS1",+ "x": -500,+ "y": 871,+ "length": 100,+ "rotation": 0+ },+ {+ "number": "12",+ "name": "VC5",+ "x": -500,+ "y": 771,+ "length": 100,+ "rotation": 0+ },+ {+ "number": "13",+ "name": "VC4",+ "x": -500,+ "y": 671,+ "length": 100,+ "rotation": 0+ },+ {+ "number": "14",+ "name": "VC3",+ "x": -500,+ "y": 571,+ "length": 100,+ "rotation": 0+ },+ {+ "number": "15",+ "name": "VC2",+ "x": -500,+ "y": 471,+ "length": 100,+ "rotation": 0+ },+ {+ "number": "16",+ "name": "VC1",+ "x": -500,+ "y": 371,+ "length": 100,+ "rotation": 0+ },+ {+ "number": "17",+ "name": "VC0",+ "x": -500,+ "y": 271,+ "length": 100,+ "rotation": 0+ },+ {+ "number": "18",+ "name": "SRP",+ "x": -500,+ "y": 171,+ "length": 100,+ "rotation": 0+ },+ {+ "number": "19",+ "name": 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BQ7692003PWR.lbradded+158@@ -0,0 +1,158 @@+<?xml version="1.0" encoding="utf-8"?>+<!DOCTYPE eagle SYSTEM "eagle.dtd">+<eagle version="9.6.2">+<drawing>+<settings><setting alwaysvectorfont="no"/></settings>+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>+<layers>+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>+<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/>+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/>+<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes"/>+<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/>+<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="yes"/>+<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/>+<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/>+<layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes"/>+<layer number="32" name="bCream" color="7" fill="5" visible="no" active="yes"/>+<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="yes"/>+<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="yes"/>+<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="yes"/>+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes"/>+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes"/>+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes"/>+<layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="yes"/>+<layer number="40" name="bKeepout" color="1" fill="11" visible="no" active="yes"/>+<layer number="41" name="tRestrict" color="4" fill="10" visible="no" active="yes"/>+<layer number="42" name="bRestrict" color="1" fill="10" visible="no" active="yes"/>+<layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="yes"/>+<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes"/>+<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes"/>+<layer number="46" name="Milling" color="3" fill="1" visible="no" active="yes"/>+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/>+<layer number="48" name="Document" color="7" fill="1" visible="yes" active="yes"/>+<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="yes"/>+<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/>+<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/>+<layer number="93" name="Pins" color="2" fill="1" visible="no" active="yes"/>+<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/>+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/>+<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/>+<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/>+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/>+</layers>+<library>+<description>BQ76920 3-to-5 series cell battery monitor and analog front-end (AFE) for Li-Ion and phosphate battery packs. Provides cell voltage / pack current / thermistor sensing, integrated cell balancing FETs, hardware overvoltage / undervoltage / overcurrent / short-circuit protection, and an I2C interface to a host controller. The '03' variant is configured for I2C address 0x08, a 3.3-V LDO output, and no CRC on the I2C bus.</description>+<packages>+<package name="BQ7692003">+ <description>BQ7692003</description>+ <smd name="1" x="-2.5250" y="2.9250" dx="1.5000" dy="0.4500" layer="1"/>+ <smd name="2" x="-2.5250" y="2.2750" dx="1.5000" dy="0.4500" layer="1"/>+ <smd name="3" x="-2.5250" y="1.6250" dx="1.5000" dy="0.4500" layer="1"/>+ <smd name="4" x="-2.5250" y="0.9750" dx="1.5000" dy="0.4500" layer="1"/>+ <smd name="5" x="-2.5250" y="0.3250" dx="1.5000" dy="0.4500" layer="1"/>+ <smd name="6" x="-2.5250" y="-0.3250" dx="1.5000" dy="0.4500" layer="1"/>+ <smd name="7" x="-2.5250" y="-0.9750" dx="1.5000" dy="0.4500" layer="1"/>+ <smd name="8" x="-2.5250" y="-1.6250" dx="1.5000" dy="0.4500" layer="1"/>+ <smd name="9" x="-2.5250" y="-2.2750" dx="1.5000" dy="0.4500" layer="1"/>+ <smd name="10" x="-2.5250" y="-2.9250" dx="1.5000" dy="0.4500" layer="1"/>+ <smd name="11" x="2.5250" y="-2.9250" dx="1.5000" dy="0.4500" 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align="bottom-center">>NAME</text>+ <text x="0" y="-4.275" size="1.27" layer="27" align="top-center">>VALUE</text>+</package>+</packages>+<symbols>+<symbol name="BQ7692003">+ <wire x1="-10.16" y1="2.54" x2="10.16" y2="2.54" width="0.254" layer="94"/>+ <wire x1="10.16" y1="2.54" x2="10.16" y2="-50.64" width="0.254" layer="94"/>+ <wire x1="10.16" y1="-50.64" x2="-10.16" y2="-50.64" width="0.254" layer="94"/>+ <wire x1="-10.16" y1="-50.64" x2="-10.16" y2="2.54" width="0.254" layer="94"/>+ <text x="0" y="5.08" size="1.27" layer="95" align="bottom-center">>NAME</text>+ <text x="0" y="-53.18" size="1.27" layer="96" align="top-center">>VALUE</text>+ <pin name="TS1" x="-12.7" y="-2" length="short" direction="in"/>+ <pin name="VC5" x="-12.7" y="-4.54" length="short" direction="in"/>+ <pin name="VC4" x="-12.7" y="-7.08" length="short" direction="in"/>+ <pin name="VC3" x="-12.7" y="-9.62" length="short" direction="in"/>+ <pin name="VC2" x="-12.7" y="-12.16" length="short" direction="in"/>+ <pin name="VC1" x="-12.7" y="-14.7" length="short" direction="in"/>+ <pin name="VC0" x="-12.7" y="-17.24" length="short" direction="in"/>+ <pin name="SRP" x="-12.7" y="-19.78" length="short" direction="in"/>+ <pin name="SRN" x="-12.7" y="-22.32" length="short" direction="in"/>+ <pin name="NC" x="-12.7" y="-30.67" length="short" direction="nc"/>+ <pin name="DSG" x="12.7" y="-2" length="short" direction="out" rot="R180"/>+ <pin name="CHG" x="12.7" y="-4.54" length="short" direction="out" rot="R180"/>+ <pin name="VSS" x="12.7" y="-12.89" length="short" direction="pwr" rot="R180"/>+ <pin name="SDA" x="12.7" y="-21.24" length="short" direction="io" rot="R180"/>+ <pin name="SCL" x="12.7" y="-23.78" length="short" direction="in" rot="R180"/>+ <pin name="CAP1" x="12.7" y="-32.13" length="short" direction="out" rot="R180"/>+ <pin name="REGOUT" x="12.7" y="-34.67" length="short" direction="out" rot="R180"/>+ <pin name="REGSRC" x="12.7" y="-37.21" length="short" direction="pwr" rot="R180"/>+ <pin name="BAT" x="12.7" y="-39.75" length="short" direction="pwr" rot="R180"/>+ <pin name="ALERT" x="12.7" y="-48.1" length="short" direction="io" rot="R180"/>+ <text x="-9.16" y="0" size="0.762" layer="94" font="vector" ratio="15">ADC</text>+ <text x="-9.16" y="-28.67" size="0.762" layer="94" font="vector" ratio="15">NC</text>+ <text x="9.16" y="0" size="0.762" layer="94" font="vector" ratio="15" align="right">CONTROL</text>+ <text x="9.16" y="-10.89" size="0.762" layer="94" font="vector" ratio="15" align="right">GROUND</text>+ <text x="9.16" y="-19.24" size="0.762" layer="94" font="vector" ratio="15" align="right">I2C</text>+ <text x="9.16" y="-30.13" size="0.762" layer="94" font="vector" ratio="15" align="right">POWER</text>+ <text x="9.16" y="-46.1" size="0.762" layer="94" font="vector" ratio="15" align="right">ALERT</text>+</symbol>+</symbols>+<devicesets>+<deviceset name="BQ7692003" prefix="U">+ <description>BQ76920 3-to-5 series cell battery monitor and analog front-end (AFE) for Li-Ion and phosphate battery packs. Provides cell voltage / pack current / thermistor sensing, integrated cell balancing FETs, hardware overvoltage / undervoltage / overcurrent / short-circuit protection, and an I2C interface to a host controller. The '03' variant is configured for I2C address 0x08, a 3.3-V LDO output, and no CRC on the I2C bus.</description>+ <gates>+ <gate name="G$1" symbol="BQ7692003" x="0" y="0"/>+ </gates>+ <devices>+ <device name="" package="BQ7692003">+ <connects>+ <connect gate="G$1" pin="TS1" pad="6"/>+ <connect gate="G$1" pin="VC5" pad="12"/>+ <connect gate="G$1" pin="VC4" pad="13"/>+ <connect gate="G$1" pin="VC3" pad="14"/>+ <connect gate="G$1" pin="VC2" pad="15"/>+ <connect gate="G$1" pin="VC1" pad="16"/>+ <connect gate="G$1" pin="VC0" pad="17"/>+ <connect gate="G$1" pin="SRP" pad="18"/>+ <connect gate="G$1" pin="SRN" pad="19"/>+ <connect gate="G$1" pin="NC" pad="11"/>+ <connect gate="G$1" pin="DSG" pad="1"/>+ <connect gate="G$1" pin="CHG" pad="2"/>+ <connect gate="G$1" pin="VSS" pad="3"/>+ <connect gate="G$1" pin="SDA" pad="4"/>+ <connect gate="G$1" pin="SCL" pad="5"/>+ <connect gate="G$1" pin="CAP1" pad="7"/>+ <connect gate="G$1" pin="REGOUT" pad="8"/>+ <connect gate="G$1" pin="REGSRC" pad="9"/>+ <connect gate="G$1" pin="BAT" pad="10"/>+ <connect gate="G$1" pin="ALERT" pad="20"/>+ </connects>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+</devicesets>+</library>+</drawing>+</eagle>