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Set visibility: public

Ray ·902221b342 ·2mo ago ·parent 1099212
1 file changed +10−7
page.json+10−7
@@ -50,25 +50,25 @@         "number": "4",         "name": "CHG_EN",         "type": "input",-        "description": "Charge FET enable. Digital input from AFE or MCU (VIL max 0.6 V, VIH min 1.2 V, 15 V absolute max). Internal ~1 M\u03a9 pull-down. Must be current limited (max 5 mA)."+        "description": "Charge FET enable. Digital input from AFE or MCU (VIL max 0.6 V, VIH min 1.2 V, 15 V absolute max). Internal ~1 MΩ pull-down. Must be current limited (max 5 mA)."       },       {         "number": "5",         "name": "CP_EN",         "type": "input",-        "description": "Charge pump enable. Internally logic-ORed with CHG_EN and DSG_EN signals. Digital input (VIL max 0.6 V, VIH min 1.2 V, 15 V absolute max) with internal ~1 M\u03a9 pull-down."+        "description": "Charge pump enable. Internally logic-ORed with CHG_EN and DSG_EN signals. Digital input (VIL max 0.6 V, VIH min 1.2 V, 15 V absolute max) with internal ~1 MΩ pull-down."       },       {         "number": "6",         "name": "DSG_EN",         "type": "input",-        "description": "Discharge FET enable. Digital input (VIL max 0.6 V, VIH min 1.2 V, 15 V absolute max) with internal ~1 M\u03a9 pull-down."+        "description": "Discharge FET enable. Digital input (VIL max 0.6 V, VIH min 1.2 V, 15 V absolute max) with internal ~1 MΩ pull-down."       },       {         "number": "7",         "name": "PMON_EN",         "type": "input",-        "description": "Pack monitor enable. Enables the internal switch (typ 2.5 k\u03a9, 1.5-3.5 k\u03a9) between PACK and PACKDIV pins to allow pack-voltage sensing. Recommended to tie to ground if unused."+        "description": "Pack monitor enable. Enables the internal switch (typ 2.5 kΩ, 1.5-3.5 kΩ) between PACK and PACKDIV pins to allow pack-voltage sensing. Recommended to tie to ground if unused."       },       {         "number": "8",@@ -98,7 +98,7 @@         "number": "12",         "name": "DSG",         "type": "output",-        "description": "Gate drive for discharge N-channel high-side FET. Gate drive voltage V(DSG)-V(PACK) typically 12 V (9-14 V) when DSG_EN=Hi. Driver on-resistance 3.5 k\u03a9 typ; off-resistance 1 k\u03a9 typ."+        "description": "Gate drive for discharge N-channel high-side FET. Gate drive voltage V(DSG)-V(PACK) typically 12 V (9-14 V) when DSG_EN=Hi. Driver on-resistance 3.5 kΩ typ; off-resistance 1 kΩ typ."       },       {         "number": "13",@@ -122,7 +122,7 @@         "number": "16",         "name": "CHG",         "type": "output",-        "description": "Gate drive for charge N-channel high-side FET. Gate drive voltage V(CHG)-V(BAT) typically 12 V (9-14 V) when CHG_EN=Hi. Driver on-resistance 1.1 k\u03a9 typ; off-resistance 0.3 k\u03a9 typ."+        "description": "Gate drive for charge N-channel high-side FET. Gate drive voltage V(CHG)-V(BAT) typically 12 V (9-14 V) when CHG_EN=Hi. Driver on-resistance 1.1 kΩ typ; off-resistance 0.3 kΩ typ."       }     ],     "provenance": {@@ -186,5 +186,8 @@     "docs/bq76200pwr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file