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Initial commit: component/bq294502drvr

Ray ·8d5fc3ecb7 ·
2 files changed +196
README.mdadded+44
@@ -0,0 +1,44 @@+# BQ294502DRVR++**Texas Instruments** · Battery Management · WSON-6-EP(2x2)++BQ294502DRVR from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | V3 | input | Sense input for positive voltage of the third (topmost) cell; accepts 0-5 V differential input with external RC filter (RIN, CIN) as required in Section 9.2.1. |+| 2 | V2 | input | Sense input for positive voltage of the second (middle) cell; accepts 0-5 V differential input with external RC filter (RIN, CIN) as required in Section 9.2.1. |+| 3 | VSS | power_in | Ground; electrically connected to IC ground and negative terminal of the lowest cell in the battery stack. |+| 4 | V1 | input | Sense input for positive voltage of the first (lowest) cell; accepts 0-5 V differential input with external RC filter (RIN, CIN) as required in Section 9.2.1. |+| 5 | VDD | power_in | Power supply input; operates from 3 to 25 V recommended with quiescent current of 1 µA typical (Section 7.5). |+| 6 | OUT | output | N-channel FET gate driver output; transitions high after 4 s fixed delay when any cell voltage exceeds 4.35 V protection threshold, transitions low when all cell voltages fall below threshold minus 300 mV hysteresis (Section 8.3.2). |+| 7 | PWRPAD | power_in | Thermal pad internally connected to VSS; must be soldered to circuit board VSS ground plane for proper thermal management and mechanical performance (Section 11.1). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WSON-6-EP(2x2) |+| Category | Power Management (PMIC) |+| Pins | 7 |++## CAD (KiCad official)++- Symbol: `BQ294502DRVR`+- Footprint: `Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm`+- 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)+- 3D model files: `bq294502drvr-etched.step` / `bq294502drvr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `bq294502drvr.step` / `bq294502drvr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/bq294522) (25 pp, sha256 `9a3e52a97d8e79bb`, retrieved 2026-09-27, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/bq294502drvr-datasheet.pdf)
page.jsonadded+152
@@ -0,0 +1,152 @@+{+  "slug": "bq294502drvr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Battery Management, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "bq294502drvr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "bq294502drvr.kicad_sym",+    "bq294502drvr.kicad_mod",+    "bq294502drvr.glb",+    "bq294502drvr.step",+    "bq294502drvr.lbr",+    "docs/hero.png",+    "docs/bq294502drvr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "BQ294502DRVR",+    "manufacturer": "Texas Instruments",+    "package": "WSON-6-EP(2x2)",+    "pin_count": 7,+    "category": "Power Management (PMIC)",+    "subcategory": "Battery Management",+    "datasheet": "https://www.ti.com/cn/lit/gpn/bq294522",+    "parts": {+      "symbol": "bq294502drvr.kicad_sym",+      "footprint": "bq294502drvr.kicad_mod",+      "model_3d": "bq294502drvr-etched.glb",+      "model_3d_plain": "bq294502drvr.glb",+      "model_3d_step": "bq294502drvr-etched.step",+      "model_3d_step_plain": "bq294502drvr.step",+      "lbr": "bq294502drvr.lbr"+    },+    "distributor_links": {+      "lcsc": "C2876278",+      "digikey": "296-49562-2-ND",+      "mouser": "595-BQ294502DRVR"+    },+    "distributor_check": {+      "checked_at": "2026-09-27T09:06:10Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-49562-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-BQ294502DRVR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "V3",+        "type": "input",+        "description": "Sense input for positive voltage of the third (topmost) cell; accepts 0-5 V differential input with external RC filter (RIN, CIN) as required in Section 9.2.1."+      },+      {+        "number": "2",+        "name": "V2",+        "type": "input",+        "description": "Sense input for positive voltage of the second (middle) cell; accepts 0-5 V differential input with external RC filter (RIN, CIN) as required in Section 9.2.1."+      },+      {+        "number": "3",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground; electrically connected to IC ground and negative terminal of the lowest cell in the battery stack."+      },+      {+        "number": "4",+        "name": "V1",+        "type": "input",+        "description": "Sense input for positive voltage of the first (lowest) cell; accepts 0-5 V differential input with external RC filter (RIN, CIN) as required in Section 9.2.1."+      },+      {+        "number": "5",+        "name": "VDD",+        "type": "power_in",+        "description": "Power supply input; operates from 3 to 25 V recommended with quiescent current of 1 µA typical (Section 7.5)."+      },+      {+        "number": "6",+        "name": "OUT",+        "type": "output",+        "description": "N-channel FET gate driver output; transitions high after 4 s fixed delay when any cell voltage exceeds 4.35 V protection threshold, transitions low when all cell voltages fall below threshold minus 300 mV hysteresis (Section 8.3.2)."+      },+      {+        "number": "7",+        "name": "PWRPAD",+        "type": "power_in",+        "description": "Thermal pad internally connected to VSS; must be soldered to circuit board VSS ground plane for proper thermal management and mechanical performance (Section 11.1)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The thermal pad (PWRPAD) is listed in the pin function table on page 3 without an explicit pin numbe"+        ],+        "pages_sent": 25,+        "cost_usd": 0.2588,+        "at": "2026-09-27T09:05:53"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/bq294522",+        "pages": 25,+        "sha256": "9a3e52a97d8e79bb",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 7,+        "described": 7,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file