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Initial commit: component/bq24073rgtr

Ray ·98215d6c8f ·2mo ago
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README.mdadded+67
@@ -0,0 +1,67 @@+# BQ24073RGTR++**Texas Instruments** · Battery Management · QFN-16-EP(3x3)++BQ24073RGTR from Texas Instruments, in a QFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | TS | input | External NTC thermistor input. Connect to a 10 kΩ NTC in the battery pack to monitor pack temperature. If unused, tie to VSS through a fixed 10 kΩ resistor to maintain a valid voltage. |+| 2 | BAT | power_out | Charger power stage output and battery voltage sense. Connect to the positive terminal of the battery; bypass to VSS with a 4.7 µF to 47 µF ceramic capacitor. Pins 2 and 3 are internally tied together. |+| 3 | BAT | power_out | Charger power stage output and battery voltage sense. Connect to the positive terminal of the battery; bypass to VSS with a 4.7 µF to 47 µF ceramic capacitor. Pins 2 and 3 are internally tied together. |+| 4 | CE | input | Charge enable, active-low. Drive high to disable the battery charger (OUT and battery supplement mode still available); drive low to enable charging. Internally pulled down through ~285 kΩ; do not leave floating. |+| 5 | EN2 | input | Input current limit configuration bit 2 (with EN1) for USB compliance and ILIM enable. See EN1/EN2 table. Internally pulled down through ~285 kΩ; do not leave floating. |+| 6 | EN1 | input | Input current limit configuration bit 1 (with EN2) for USB compliance and ILIM enable. See EN1/EN2 table. Internally pulled down through ~285 kΩ; do not leave floating. |+| 7 | PGOOD | output | Open-drain power good status. Pulls to VSS when a valid input source within limits is detected; high-impedance otherwise. Tie to a 1 kΩ-100 kΩ pull-up to the logic rail or use with an LED. |+| 8 | VSS | power_in | Ground. Connect to the thermal pad and to the circuit ground rail. |+| 9 | CHG | output | Open-drain charging status indicator (active-low). Pulls to VSS while the battery is charging and is high-impedance when charging is complete or the charger is disabled. Pull up through a 1 kΩ-100 kΩ resistor to the logic rail or drive an LED. |+| 10 | OUT | power_out | Regulated system supply output from the power-path stage. Delivers a regulated voltage (BQ24073: 4.4 V) when the input is within range, otherwise connects to VBAT. Bypass to VSS with a 4.7 µF to 47 µF ceramic capacitor; pins 10 and 11 are tied together. |+| 11 | OUT | power_out | Regulated system supply output from the power-path stage. Delivers a regulated voltage (BQ24073: 4.4 V) when the input is within range, otherwise connects to VBAT. Bypass to VSS with a 4.7 µF to 47 µF ceramic capacitor; pins 10 and 11 are tied together. |+| 12 | ILIM | input | Adjustable input current limit programming pin. Connect a 1100 Ω to 8 kΩ resistor from ILIM to VSS to set the maximum input current when EN2=1, EN1=0. Leaving ILIM unconnected disables all charging. |+| 13 | IN | power_in | Input power from AC adapter or USB port. Operating range 4.35 V to 6.6 V (BQ24073); withstands up to 26 V without damage but operation is suspended above OVP (6.6 V). Bypass to VSS with 1 µF to 10 µF ceramic. |+| 14 | TMR | input | Safety-timer programming input. Tie to VSS to disable all safety timers; connect an 18 kΩ to 72 kΩ resistor from TMR to VSS to program pre-charge and fast-charge timer lengths. Leave floating for default timers. |+| 15 | TD | input | Termination-disable input. Drive high to disable charge termination; tie to VSS to enable termination. Sampled at startup only. Internally pulled down through ~285 kΩ; do not leave floating. |+| 16 | ISET | bidirectional | Fast-charge current programming and monitor pin. Connect a 590 Ω to 8.9 kΩ resistor from ISET to VSS to set fast-charge current; the voltage at ISET mirrors the actual charge current. Leaving ISET floating disables charging. |+| 17 | PAD | power_in | Exposed thermal pad, internally tied to VSS. Must be soldered to the PCB ground plane at the same potential as VSS for thermal performance; do not use as the primary ground path - pin 8 (VSS) must still be connected to ground. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | QFN-16-EP(3x3) |+| Category | PMIC |+| Pins | 17 |++## Ordering variants++Same part, different packaging or reel option.++- `BQ24073RGTR`+- `BQ24073RGTRRGTT`+- `BQ24072RGTR`+- `BQ24072RGTT`+- `BQ24074RGTR`+- `BQ24074RGTT`+- `BQ24075RGTR`+- `BQ24075RGTT`+- `BQ24079RGTR`+- `BQ24079RGTT`++## CAD (KiCad official)++- Symbol: `BQ24073RGTR`+- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`+- 3D model: QFN-16-EP(3x3) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/bq24073.pdf) (53 pp, sha256 `3c8a0a906dc305bc`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/bq24073rgtr-datasheet.pdf)
page.jsonadded+34
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