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README.md+72−72
@@ -8,55 +8,55 @@ BLUENRG-345MC from STMicroelectronics, in a QFN-48-EP(6x6). Pinout and pin descr  | Pin | Name | Type | Function | |---|---|---|---|-| 1 | PB3 | bidirectional | I/O with FT_a structure (5 V tolerant), alternate functions USART_CTS, LPUART_TX, TIM1_CH4, ADC input ADC_VINP0, and wakeup. |-| 2 | PB2 | bidirectional | I/O with FT_a structure (5 V tolerant), alternate functions USART_RTS_DE, PDM_DATA, TIM1_CH3, ADC input ADC_VINM0, and wakeup. |-| 3 | PB1 | bidirectional | I/O with FT_a structure (5 V tolerant), alternate functions SPI1_NSS, PDM_CLK, TIM1_ETR, ADC input ADC_VINP1, and wakeup. |-| 4 | PB0 | bidirectional | I/O with FT_a structure (5 V tolerant), alternate functions USART_RX, LPUART_RTS_DE, TIM1_CH2N, ADC input ADC_VINM1, and wakeup. |-| 5 | PA15 | bidirectional | I/O with FT_a structure (5 V tolerant), alternate functions I2C2_SMBA, SPI1_MOSI, TIM1_BKIN2, ADC input ADC_VINP2, and wakeup. |-| 6 | PA14 | bidirectional | I/O with FT_a structure (5 V tolerant), alternate functions I2C2_SDA, SPI1_MISO, TIM1_BKIN, ADC input ADC_VINM2, and wakeup. |-| 7 | PA13 | bidirectional | I/O with FT_a structure (5 V tolerant), alternate functions I2C2_SCL, SPI1_SCK, SPI2_MISO, TIM1_ETR, I2S2_MISO, ADC input ADC_VINP3, and wakeup. |-| 8 | PA12 | bidirectional | I/O with FT_a structure (5 V tolerant), alternate functions I2C1_SMBA, SPI1_NSS, SPI2_MOSI, TIM1_CH1, I2S2_SD, ADC input ADC_VINM3, and wakeup. |-| 9 | PA11 | bidirectional | I/O with FT structure (5 V tolerant), alternate functions MCO, SPI1_NSS, RX_SEQUENCE, SPI3_MOSI, TIM1_CH6, I2S3_SD, with wakeup, GPIO in DEEPSTOP and RTC_OUT. |-| 10 | PA10 | bidirectional | I/O with FT structure (5 V tolerant), alternate functions LCO, SPI1_MISO, TX_SEQUENCE, SPI3_MCK, TIM1_CH5, I2S3_MCK, with BOOT, wakeup and GPIO in DEEPSTOP. |-| 11 | PA9 | bidirectional | I/O with FT structure (5 V tolerant), alternate functions USART_TX, SPI1_SCK, RTC_OUT, SPI3_NSS, TIM1_CH4, I2S3_WS, with wakeup, GPIO in DEEPSTOP and LCO. |-| 12 | PA8 | bidirectional | I/O with FT structure (5 V tolerant), alternate functions USART_RX, SPI1_MOSI, RX_SEQUENCE, SPI3_MISO, TIM1_CH3, I2S3_MISO, with wakeup, GPIO in DEEPSTOP and RTC_OUT. |-| 13 | PA0 | bidirectional | I/O with FT_f structure (I/O, Fm+ capable, 5 V tolerant), alternate functions I2C1_SCL, USART_CTS, SPI2_MCK, TIM1_CH3, I2S2_MCK, with wakeup. |-| 14 | PA1 | bidirectional | I/O with FT_f structure (I/O, Fm+ capable, 5 V tolerant), alternate functions I2C1_SDA, SPI2_MISO, USART_TX, TIM1_CH4, I2S2_MISO, with wakeup. |-| 15 | PA2 | bidirectional | I/O with FT structure (5 V tolerant), alternate function SWDIO (serial wire debug data) plus USART_CK, TIM_BKIN, SPI3_MCK, TIM1_CH5, I2S3_MCK, with wakeup. |-| 16 | PA3 | bidirectional | I/O with FT structure (5 V tolerant), alternate function SWCLK (serial wire debug clock) plus USART_RTS_DE, TIM_BKIN2, SPI3_SCK, TIM1_CH6, I2S3_SCK, with wakeup. |-| 17 | PA4 | bidirectional | I/O with FT structure (5 V tolerant), alternate functions LCO, SPI2_NSS, LPUART_TX, TIM1_CH1, I2S2_WS, with wakeup, GPIO in DEEPSTOP and LCO. |-| 18 | PA5 | bidirectional | I/O with FT structure (5 V tolerant), alternate functions MCO, SPI2_SCK, LPUART_RX, TIM1_CH2, I2S2_SCK, with wakeup, GPIO in DEEPSTOP and LCO. |-| 19 | PA6 | bidirectional | I/O with FT structure (5 V tolerant), alternate functions LPUART_CTS, SPI2_MOSI, SPI2_NSS, TIM1_CH1, I2S2_SD, I2S2_WS, with wakeup, GPIO in DEEPSTOP and LCO. |-| 20 | PA7 | bidirectional | I/O with FT structure (5 V tolerant), alternate functions LPUART_RTS_DE, SPI2_MISO, SPI2_SCK, TIM1_CH2, I2S2_MISO, I2S2_SCK, with wakeup, GPIO in DEEPSTOP and RTC_OUT. |+| 1 | PB3 | bidirectional | 5 V tolerant FT_a I/O with analog switch function; alternate functions USART_CTS, LPUART_TX, TIM1_CH4, additional functions ADC_VINP0 and wakeup. |+| 2 | PB2 | bidirectional | 5 V tolerant FT_a I/O with analog switch function; alternate functions USART_RTS_DE, PDM_DATA, TIM1_CH3, additional functions ADC_VINM0 and wakeup. |+| 3 | PB1 | bidirectional | 5 V tolerant FT_a I/O with analog switch function; alternate functions SPI1_NSS, PDM_CLK, TIM1_ETR, additional functions ADC_VINP1 and wakeup. |+| 4 | PB0 | bidirectional | 5 V tolerant FT_a I/O with analog switch function; alternate functions USART_RX, LPUART_RTS_DE, TIM1_CH2N, additional functions ADC_VINM1 and wakeup. |+| 5 | PA15 | bidirectional | 5 V tolerant FT_a I/O with analog switch function; alternate functions I2C2_SMBA, SPI1_MOSI, TIM1_BKIN2, additional functions ADC_VINP2 and wakeup. |+| 6 | PA14 | bidirectional | 5 V tolerant FT_a I/O with analog switch function; alternate functions I2C2_SDA, SPI1_MISO, TIM1_BKIN, additional functions ADC_VINM2 and wakeup. |+| 7 | PA13 | bidirectional | 5 V tolerant FT_a I/O with analog switch function; alternate functions I2C2_SCL, SPI1_SCK, SPI2_MISO, TIM1_ETR, I2S2_MISO, additional functions ADC_VINP3 and wakeup. |+| 8 | PA12 | bidirectional | 5 V tolerant FT_a I/O with analog switch function; alternate functions I2C1_SMBA, SPI1_NSS, SPI2_MOSI, TIM1_CH1, I2S2_SD, additional functions ADC_VINM3 and wakeup. |+| 9 | PA11 | bidirectional | 5 V tolerant FT I/O; alternate functions MCO, SPI1_NSS, RX_SEQUENCE, SPI3_MOSI, TIM1_CH6, I2S3_SD; additional functions wakeup, GPIO in DEEPSTOP and RTC_OUT. |+| 10 | PA10 | bidirectional | 5 V tolerant FT I/O; alternate functions LCO, SPI1_MISO, TX_SEQUENCE, SPI3_MCK, TIM1_CH5, I2S3_MCK; additional functions BOOT, wakeup, GPIO in DEEPSTOP and LCO. |+| 11 | PA9 | bidirectional | 5 V tolerant FT I/O; alternate functions USART_TX, SPI1_SCK, RTC_OUT, SPI3_NSS, TIM1_CH4, I2S3_WS; additional functions wakeup, GPIO in DEEPSTOP and LCO. |+| 12 | PA8 | bidirectional | 5 V tolerant FT I/O; alternate functions USART_RX, SPI1_MOSI, RX_SEQUENCE, SPI3_MISO, TIM1_CH3, I2S3_MISO; additional functions wakeup, GPIO in DEEPSTOP and RTC_OUT. |+| 13 | PA0 | bidirectional | 5 V tolerant FT_f I/O (Fm+ capable); alternate functions I2C1_SCL, USART_CTS, SPI2_MCK, TIM1_CH3, I2S2_MCK; additional function wakeup. |+| 14 | PA1 | bidirectional | 5 V tolerant FT_f I/O (Fm+ capable); alternate functions I2C1_SDA, SPI2_MISO, USART_TX, TIM1_CH4, I2S2_MISO; additional function wakeup. |+| 15 | PA2 | bidirectional | 5 V tolerant FT I/O; alternate functions SWDIO, USART_CK, TIM_BKIN, SPI3_MCK, TIM1_CH5, I2S3_MCK; additional function wakeup. |+| 16 | PA3 | bidirectional | 5 V tolerant FT I/O; alternate functions SWCLK, USART_RTS_DE, TIM_BKIN2, SPI3_SCK, TIM1_CH6, I2S3_SCK; additional function wakeup. |+| 17 | PA4 | bidirectional | 5 V tolerant FT I/O; alternate functions LCO, SPI2_NSS, LPUART_TX, TIM1_CH1, I2S2_WS; additional functions wakeup, GPIO in DEEPSTOP and LCO. |+| 18 | PA5 | bidirectional | 5 V tolerant FT I/O; alternate functions MCO, SPI2_SCK, LPUART_RX, TIM1_CH2, I2S2_SCK; additional functions wakeup, GPIO in DEEPSTOP and LCO. |+| 19 | PA6 | bidirectional | 5 V tolerant FT I/O; alternate functions LPUART_CTS, SPI2_MOSI, SPI2_NSS, TIM1_CH1, I2S2_SD, I2S2_WS; additional functions wakeup, GPIO in DEEPSTOP and LCO. |+| 20 | PA7 | bidirectional | 5 V tolerant FT I/O; alternate functions LPUART_RTS_DE, SPI2_MISO, SPI2_SCK, TIM1_CH2, I2S2_MISO, I2S2_SCK; additional functions wakeup, GPIO in DEEPSTOP and RTC_OUT. | | 21 | VDD2 | power_in | Battery voltage input, 1.7 to 3.6 V. | | 22 | RF1 | bidirectional | RF input/output with 50 Ω impedance. | | 23 | VDDRF | power_in | Battery voltage input, 1.7 to 3.6 V. |-| 24 | OSCOUT | bidirectional | RF I/O used for the 32 MHz crystal connection. |-| 25 | OSCIN | bidirectional | RF I/O used for the 32 MHz crystal connection. |+| 24 | OSCOUT | bidirectional | RF pin for the 32 MHz crystal connection. |+| 25 | OSCIN | bidirectional | RF pin for the 32 MHz crystal connection. | | 26 | VDD4 | power_in | Battery voltage input, 1.7 to 3.6 V. |-| 27 | PB15 | bidirectional | I/O with FT structure (5 V tolerant), alternate functions I2C1_SMBA, TX_SEQUENCE, MCO, TIM1_CH4N, TIM1_CH6, USART_TX. |-| 28 | PB14 | bidirectional | I/O with FT_a structure (5 V tolerant), alternate functions SPI1_MOSI, I2C2_SDA, TIM1_ETR, TIM1_CH3N, TIM1_CH5, USART_RX, with additional function VIN_PVD. |-| 29 | PB13 | bidirectional | I/O with FT structure (5 V tolerant), alternate functions SPI1_MISO, I2C2_SCL, PDM_CLK, TIM1_BKIN2, TIM1_CH4, with additional function SXTAL1 (low-speed crystal). |-| 30 | PB12 | bidirectional | I/O with FT structure (5 V tolerant), alternate functions SPI1_SCK, LCO, PDM_DATA, TIM1_BKIN, TIM1_CH3, with additional function SXTAL0 (low-speed crystal). |-| 31 | VCAP | power_out | 1.2 V digital core supply node. |-| 32 | VFBSD | power_out | SMPS output (feedback node of the embedded step-down converter). |-| 33 | NC | unconnected | Listed as NC in the pin table; no function is given. |-| 34 | VSSSD | power_in | SMPS ground. |-| 35 | VLXSD | power_in | SMPS input/output node of the embedded step-down converter. |+| 27 | PB15 | bidirectional | 5 V tolerant FT I/O; alternate functions I2C1_SMBA, TX_SEQUENCE, MCO, TIM1_CH4N, TIM1_CH6, USART_TX. |+| 28 | PB14 | bidirectional | 5 V tolerant FT_a I/O with analog switch function; alternate functions SPI1_MOSI, I2C2_SDA, TIM1_ETR, TIM1_CH3N, TIM1_CH5, USART_RX; additional function VIN_PVD. |+| 29 | PB13 | bidirectional | 5 V tolerant FT I/O; alternate functions SPI1_MISO, I2C2_SCL, PDM_CLK, TIM1_BKIN2, TIM1_CH4; additional function SXTAL1. |+| 30 | PB12 | bidirectional | 5 V tolerant FT I/O; alternate functions SPI1_SCK, LCO, PDM_DATA, TIM1_BKIN, TIM1_CH3; additional function SXTAL0. |+| 31 | VCAP | power_out | 1.2 V digital core supply pin. |+| 32 | VFBSD | power_out | SMPS output pin. |+| 33 | NC | unconnected | Not connected; the datasheet gives no function for this pin. |+| 34 | VSSSD | power_in | SMPS ground pin. |+| 35 | VLXSD | passive | SMPS input/output pin. | | 36 | VDDSD | power_in | Battery voltage input, 1.7 to 3.6 V. | | 37 | VDD3 | power_in | Battery voltage input, 1.7 to 3.6 V. | | 38 | RSTN | bidirectional | Bidirectional reset pin with weak pull-up resistor. | | 39 | VDD1 | power_in | Battery voltage input, 1.7 to 3.6 V. |-| 40 | VDDA | power_out | 1.2 V analog ADC core supply node. |-| 41 | PB11 | bidirectional | I/O with FT structure (5 V tolerant), alternate functions SPI1_SCK, SPI2_NSS, I2C1_SCL, TIM1_CH1, TIM1_CH4N, I2S2_WS, with wakeup. |-| 42 | PB10 | bidirectional | I/O with FT structure (5 V tolerant), alternate functions SPI1_NSS, SPI2_SCK, I2C1_SDA, TIM1_CH2, TIM1_CH3N, I2S2_SCK, with wakeup. |-| 43 | PB9 | bidirectional | I/O with FT structure (5 V tolerant), alternate functions USART_TX, LPUART_CTS, SPI2_MCK, TIM1_CH1N, TIM1_CH2N, I2S2_MCK, with wakeup. |-| 44 | PB8 | bidirectional | I/O with FT structure (5 V tolerant), alternate functions USART_CK, LPUART_RX, TIM1_CH4, TIM1_CH1N, with wakeup. |-| 45 | PB7 | bidirectional | I/O with FT_f structure (I/O, Fm+ capable, 5 V tolerant), alternate functions I2C2_SDA, SPI2_SCK, LPUART_RX, TIM1_CH2, I2S2_SCK, with wakeup. |-| 46 | PB6 | bidirectional | I/O with FT_f structure (I/O, Fm+ capable, 5 V tolerant), alternate functions I2C2_SCL, SPI2_NSS, LPUART_TX, TIM1_CH1, I2S2_WS, with wakeup. |-| 47 | PB5 | bidirectional | I/O with TT structure (3.6 V tolerant only, not 5 V tolerant), alternate functions LPUART_RX, SPI2_MOSI, PDM_CLK, I2S2_SD, with additional function PGA_VBIAS_MIC and wakeup. |-| 48 | PB4 | bidirectional | I/O with FT structure (5 V tolerant), alternate functions LPUART_TX, SPI2_MISO, PDM_DATA, I2S2_MISO, with additional function PGA_VIN and wakeup. |-| EP | GND | power_in | Exposed pad, ground; the datasheet lists it as the Exposed pad with GND function. |+| 40 | VDDA | power_out | 1.2 V analog ADC core supply pin. |+| 41 | PB11 | bidirectional | 5 V tolerant FT I/O; alternate functions SPI1_SCK, SPI2_NSS, I2C1_SCL, TIM1_CH1, TIM1_CH4N, I2S2_WS; additional function wakeup. |+| 42 | PB10 | bidirectional | 5 V tolerant FT I/O; alternate functions SPI1_NSS, SPI2_SCK, I2C1_SDA, TIM1_CH2, TIM1_CH3N, I2S2_SCK; additional function wakeup. |+| 43 | PB9 | bidirectional | 5 V tolerant FT I/O; alternate functions USART_TX, LPUART_CTS, SPI2_MCK, TIM1_CH1N, TIM1_CH2N, I2S2_MCK; additional function wakeup. |+| 44 | PB8 | bidirectional | 5 V tolerant FT I/O; alternate functions USART_CK, LPUART_RX, TIM1_CH4, TIM1_CH1N; additional function wakeup. |+| 45 | PB7 | bidirectional | 5 V tolerant FT_f I/O (Fm+ capable); alternate functions I2C2_SDA, SPI2_SCK, LPUART_RX, TIM1_CH2, I2S2_SCK; additional function wakeup. |+| 46 | PB6 | bidirectional | 5 V tolerant FT_f I/O (Fm+ capable); alternate functions I2C2_SCL, SPI2_NSS, LPUART_TX, TIM1_CH1, I2S2_WS; additional function wakeup. |+| 47 | PB5 | bidirectional | 3.6 V tolerant TT I/O, not 5 V tolerant; alternate functions LPUART_RX, SPI2_MOSI, PDM_CLK, I2S2_SD; additional functions PGA_VBIAS_MIC and wakeup. |+| 48 | PB4 | bidirectional | 5 V tolerant FT I/O; alternate functions LPUART_TX, SPI2_MISO, PDM_DATA, I2S2_MISO; additional functions PGA_VIN and wakeup. |+| EP | GND | power_in | Exposed pad; ground. |  ## Key specifications @@ -73,7 +73,7 @@ Limits as printed in the datasheet (page.json `metadata.characteristics` carries  | Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page | |---|---|---|---|---|---|---|---|-| Supply voltage pins (DC-DC converter input and output) | VDD1, VDD2, VDD3, VDD4, VDDRF, VDDSD | -0.3 |  | 3.9 | V | DC-DC converter supply voltage input and output | 35 |+| DC-DC converter supply voltage input and output | VDD1, VDD2, VDD3, VDD4, VDDRF, VDDSD | -0.3 |  | 3.9 | V |  | 35 | | DC voltage on linear voltage regulator | VCAP, VDDA | -0.3 |  | 1.32 | V |  | 35 | | DC voltage on HSE | FXTALOUT, FXTALIN | -0.3 |  | 1.32 | V |  | 35 | | DC voltage on digital input/output pins | PA0 to PA15, PB0 to PB4, PB6 to PB15 | -0.3 |  | 3.9 | V |  | 35 |@@ -84,11 +84,11 @@ Limits as printed in the datasheet (page.json `metadata.characteristics` carries | Total current out of sum of all ground lines (sink) | ΣIVGND |  |  | 130 | mA |  | 35 | | Maximum current into each VDD power pin (source) | IVDD(PIN) |  |  | 100 | mA |  | 35 | | Maximum current out of each ground pin (sink) | IVGND(PIN) |  |  | 100 | mA |  | 35 |-| Output current sunk by any I/O and control pin | IIO(PIN) |  |  | 20 | mA | Sink | 35 |-| Output current sourced by any I/O and control pin | IIO(PIN) |  |  | 20 | mA | Source | 35 |-| Total output current sunk by sum of all I/Os and control pins | ΣIIO(PIN) |  |  | 100 | mA | Sink | 35 |-| Total output current sourced by sum of all I/Os and control pins | ΣIIO(PIN) |  |  | 100 | mA | Source | 35 |-| Storage temperature range | TSTG | -40 |  | -125 | °C | Printed as '-40 to -125'; ordering as printed | 35 |+| Output current sunk by any I/O and control pin | IIO(PIN) |  |  | 20 | mA | sunk | 35 |+| Output current sourced by any I/O and control pin | IIO(PIN) |  |  | 20 | mA | sourced | 35 |+| Total output current sunk by sum of all I/Os and control pins | ΣIIO(PIN) |  |  | 100 | mA | sunk | 35 |+| Total output current sourced by sum of all I/Os and control pins | ΣIIO(PIN) |  |  | 100 | mA | sourced | 35 |+| Storage temperature range | TSTG | -125 |  | -40 | °C |  | 35 | | Maximum junction temperature | TJ |  |  | 125 | °C |  | 35 | | Internal AHB clock frequency | fHCLK | 1 |  | 64 | MHz |  | 39 | | Internal APB0 clock | fPCLK0 | 1 |  | 64 | MHz |  | 39 |@@ -97,42 +97,42 @@ Limits as printed in the datasheet (page.json `metadata.characteristics` carries | Standard operating voltage | VDD | 1.7 |  | 3.6 | V |  | 39 | | SMPS feedback voltage | VFBSMPS | 1.4 |  | 3.6 | V |  | 39 | | Minimum RF voltage | VDDRF | 1.7 |  | 3.6 | V |  | 39 |-| I/O input voltage | VIN | -0.3 |  |  | V | Maximum printed as VDD+0.3 | 39 |+| I/O input voltage | VIN | -0.3 |  |  | V | Printed maximum is VDD+0.3 | 39 |+| Power dissipation | PD |  |  | 30 | mW | TA=105 °C, QFN48 package | 39 | | Ambient temperature | TA | -40 |  | 105 | °C | Maximum power dissipation | 39 | | Junction temperature range | TJ | -40 |  | 105 | °C |  | 39 | | Frequency range | FRANGE | 2400 |  | 2483.5 | MHz |  | 40 | | RF channel center frequency | RFCH | 2402 |  | 2480 | MHz |  | 40 |-| Symbol time accuracy | STacc | -50 |  | 50 | ppm |  | 40 |-| Maximum output power | PMAX |  |  | 8 | dBm | At antenna connector, VSMPS = 1.9 V, LDO code | 40 |-| Minimum output power | PMIN | -20 |  |  | dBm | At antenna connector | 40 |-| RF power accuracy | PRFC | -1.5 |  | 1.5 | dB | @ 27 °C | 40 |-| RF power accuracy | PRFC | -2.5 |  | 2.5 | dB | All temperatures | 40 |+| Frequency deviation average | Δf1 | 450 |  | 550 | kHz |  | 40 |+| Center frequency deviation | CFdev | -150 |  | 150 | kHz | During the packet and including both initial frequency offset and drift | 40 | | Modulation index | Mindex | 0.45 | 0.5 | 0.55 |  |  | 40 |-| Frequency drift (1 Mbps not coded) | Freqdrift | -50 |  | 50 | kHz | Integration interval #n, integration interval #0, where n=2,3,4..k | 41 |-| Initial carrier frequency drift (1 Mbps not coded) | IFreqdrift | -23 |  | 23 | kHz | Integration interval #1, integration interval #0 | 41 |-| Intermediate carrier frequency drift (1 Mbps not coded) | IntFreqdrift | -20 |  | 20 | kHz | Integration interval #n, integration interval #(n-5), where n=6,7,8..k | 41 |-| Maximum drift rate (1 Mbps not coded) | Drift Rate max | -20 |  | 20 | kHz/50 µs | Between any two 10-bit groups separated by 50 µs | 41 |-| Frequency drift (2 Mbps not coded) | Freqdrift | -50 |  | 50 | kHz | Integration interval #n, integration interval #0, where n=2,3,4..k | 41 |-| Initial carrier frequency drift (2 Mbps not coded) | IFreqdrift | -23 |  | 23 | kHz | Integration interval #1, integration interval #0 | 41 |-| Intermediate carrier frequency drift (2 Mbps not coded) | IntFreqdrift | -20 |  | 20 | kHz | Integration interval #n, integration interval #(n-5), where n=6,7,8..k | 41 |-| Maximum drift rate (2 Mbps not coded) | DriftRatemax | -20 |  | 20 | kHz/50µs | Between any two 20-bit groups separated by 50 µs | 41 |-| Frequency drift (1 Mbps LE coded S=8) | Freqdrift | -50 |  | 50 | kHz | Integration interval #n, integration interval #0, where n=1,2,3..k | 42 |-| Initial carrier frequency drift (1 Mbps LE coded S=8) | IFreqdrift | -19.2 |  | 19.2 | kHz | Integration interval #3, integration interval #0 | 42 |-| Intermediate carrier frequency drift (1 Mbps LE coded S=8) | IntFreqdrift | -19.2 |  | 19.2 | kHz | Integration interval #n, integration interval #(n-3), where n=7,8,9..k | 42 |-| Maximum drift rate (1 Mbps LE coded S=8) | DriftRatemax | -19.2 |  | 19.2 | kHz/48 µs | Between any two 16-bit groups separated by 48 µs | 42 |-| HSE crystal oscillator frequency tolerance | fTOL | -50 |  | 50 | ppm | Includes initial accuracy, stability over temperature, aging and frequency pulling due to incorrect load capacitance | 47 |-| HSE crystal load capacitance | CL | 5 | 7 | 9.2 | pF | 27 °C, typical corner, GMCONF = 3 | 47 |+| Maximum output | PMAX |  |  | 8 | dBm | At antenna connector, VSMPS = 1.9 V, LDO code | 40 |+| Minimum output | PMIN | -20 |  |  | dBm | At antenna connector | 40 |+| RF power accuracy | PRFC | -1.5 |  | 1.5 | dB | @ 27 °C | 40 |+| Symbol time accuracy | STacc | -50 |  | 50 | ppm |  | 40 |+| On-air data rate | Rgfsk | 1 |  | 2 | Mbps |  | 40 | | 32-bit programming time | tprog |  | 20 | 40 | µs |  | 49 | | Page (2 kbyte) erase time | tERASE |  | 20 | 40 | ms |  | 49 | | Mass erase time | tME |  | 20 | 40 | ms |  | 49 | | Endurance | NEND | 10 |  |  | kcycles | TA = -40 to +105 ºC | 49 |-| Data retention | tRET | 10 |  |  | years | TA = 105 ºC | 49 |-| Electrostatic discharge voltage (human body model) | VESD(HBM) |  |  | 2000 | V | Conforming to ANSI/ESDA/JEDEC JS-001, class 2 | 49 |-| Electrostatic discharge voltage (charge device model) | VESD(CBM) |  |  | 500 | V | Conforming to ANSI/ESDA/STM5.3.1 JS-002, class C2a | 49 |-| RSTN weak pull-up equivalent resistor | RPU | 25 | 40 | 55 | kΩ | VIN=GND | 50 |+| Data retention | tRET | 10 |  |  | Years | TA = 105 ºC | 49 |+| Electrostatic discharge voltage (human body model) | VESD(HBM) |  |  | 2000 | V | Conforming to ANSI/ESDA/JEDEC JS-001 | 49 |+| Electrostatic discharge voltage (charge device model) | VESD(CBM) |  |  | 500 | V | Conforming to ANSI/ESDA/STM5.3.1 JS-002 C2a | 49 |+| Input leakage current | Ilkg | -100 |  | 100 | nA | 0 <= VIN <= Max(VDDx) | 49 |+| Input leakage current | Ilkg |  |  | 650 | nA | Max(VDDx) <= VIN <= Max(VDDx) +1 V | 49 |+| Input leakage current | Ilkg |  |  | 200 | nA | Max(VDDx) + 1 V < VIN <= 5.5 V | 49 |+| Pull-up resistor | RPU | 25 | 40 | 55 | kΩ | VIN = GND | 49 |+| Pull-down resistor | RPD | 25 | 40 | 55 | kΩ | VIN = VDD | 50 |+| Output low level voltage for I/O pin, CMOS port | VOL |  |  | 0.4 | V | /IIO/ = 8 mA, VDD ≥ 2.7 V | 50 |+| Output low level voltage for I/O pin | VOL |  |  | 1.3 | V | /IIO/ = 20 mA, VDD ≥ 2.7 V | 50 |+| Output low level voltage for I/O pin | VOL |  |  | 0.4 | V | /IIO/ = 4 mA, VDD ≥ 1.62 V | 50 |+| Weak pull-up equivalent resistor (RSTN) | RPU | 25 | 40 | 55 | kΩ | VIN=GND | 50 | | Analog supply voltage | VDDA | 1.2 |  | 1.32 | V |  | 51 |+| Differential non-linearity | DNL | -0.7 |  | 0.7 | LSB |  | 51 |+| Integral non-linearity | INL | -1 |  | 1 | LSB |  | 51 | | Error in temperature | TrERR | -4 |  | 4 | °C |  | 52 |-| Maximum pulse width of spikes suppressed by the I2C analog filter | tAF | 50 |  | 110 | ns |  | 54 |+| Maximum pulse width of spikes suppressed by the analog filter | tAF | 50 |  | 110 | ns |  | 54 |+| Thermal resistance junction-ambient | ΘJA |  | 25.1 |  | °C/W | QFN48, 6 mm x 6 mm | 65 |  ## CAD (KiCad official) 
bluenrg-345mc-hero.overlay.json+1153−1151
@@ -1,1153 +1,1155 @@ {-  "spec": "adom-hero 1.4",-  "mpn": "BLUENRG-345MC",-  "kind": "component + footprint reference art",-  "board_use": false,-  "plane_z_mm": -0.02,-  "units": "metre",-  "upAxis": "Z",-  "layers": {-    "pad_outlines": {-      "material": "Footprint pads - teal dashed outlines - 50 percent opacity",-      "rgba": [-        0.0,-        0.902,-        0.863,-        0.5-      ],-      "pads": 49,-      "span_mm": 10.1,-      "dash_mm": 0.2525,-      "gap_mm": 0.1515,-      "pad_stroke_mm": 0.0606-    },-    "silkscreen": {-      "material": "Silkscreen reference lines - 30 percent opacity",-      "rgba": [-        0.92,-        0.96,-        1.0,-        0.3-      ],-      "footprint_items": 9,-      "pin1": {-        "source": "footprint silkscreen",-        "pad": "1"-      }-    },-    "signal_names": {-      "material": "Signal names - 50 percent opacity",-      "rgba": [-        0.92,-        0.96,-        1.0,-        0.5-      ],-      "font": "DejaVu Sans Mono",-      "labels": 48,-      "sides": "top + mirrored underside (single-sided)",-      "fallback_to_pad_number": 0-    }-  },-  "align": {-    "ok": true,-    "centre_offset_mm": 0.0,-    "tolerance_mm": 0.54,-    "orientation_flipped": false,-    "contacts_bbox_mm": [-      -3.01,-      3.01,-      -3.01,-      3.01-    ],-    "pads_bbox_mm": [-      -3.375,-      3.375,-      -3.375,-      3.375-    ],-    "seating_z_mm": -0.0-  },-  "sources": {-    "glb": "bluenrg-345mc-etched.glb",-    "glb_sha256": "530327787ee27a6c6c78b71a4084e4d02c56693e7aed2ee3b9acea716f617b56",-    "footprint": "bluenrg-345mc.kicad_mod",-    "footprint_sha256": "3ace090469fbf85ac59d65a5c1720bbd6787183da5cce3ee5dc49a149e3b1346",-    "pins": "page.json component.pins",-    "pins_sha256": "d675a69daa45d1e53aa20ef532a582f2bf3c1c4ec7b883e7b34333fa663b8cba"-  },-  "generator": "adom-wiki 1.7.76 (component_hero)",-  "labels": [-    {-      "pad": "1",-      "text": "PB3",-      "x": -4.07,-      "y": -2.2,-      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"vertical": true,-      "h": 0.2-    },-    {-      "pad": "48",-      "text": "PB4",-      "x": -2.2,-      "y": -3.475,-      "align": "left",-      "vertical": true,-      "h": 0.2-    }+ "spec": "adom-hero 1.4",+ "mpn": "BLUENRG-345MC",+ "kind": "component + footprint reference art",+ "board_use": false,+ "plane_z_mm": -0.02,+ "units": "metre",+ "upAxis": "Z",+ "layers": {+  "pad_outlines": {+   "material": "Footprint pads - teal dashed outlines - 50 percent opacity",+   "rgba": [+    0.0,+    0.902,+    0.863,+    0.5+   ],+   "pads": 49,+   "span_mm": 10.1,+   "dash_mm": 0.2525,+   "gap_mm": 0.1515,+   "pad_stroke_mm": 0.0606+  },+  "silkscreen": {+   "material": "Silkscreen reference lines - 30 percent opacity",+   "rgba": [+    0.92,+    0.96,+    1.0,+    0.3+   ],+   "footprint_items": 9,+   "pin1": {+    "source": "footprint silkscreen",+    "pad": "1"+   }+  },+  "signal_names": {+   "material": "Signal names - 50 percent opacity",+   "rgba": [+    0.92,+    0.96,+    1.0,+    0.5+   ],+   "font": "DejaVu Sans Mono",+   "labels": 48,+   "sides": "top + mirrored underside (single-sided)",+   "omitted": null,+   "fallback_to_pad_number": 0+  }+ },+ "align": {+  "ok": true,+  "centre_offset_mm": 0.0,+  "over_pads": false,+  "tolerance_mm": 0.54,+  "orientation_flipped": false,+  "contacts_bbox_mm": [+   -3.01,+   3.01,+   -3.01,+   3.01   ],-  "pads": [-    {-      "number": "1",-      "shape": "roundrect",-      "center_mm": [-        -2.95,-        -2.2-      ],-      "size_mm": [-        0.85,-        0.2-      ],-      "rot": 0.0-    },-    {-      "number": "2",-      "shape": "roundrect",-      "center_mm": [-        -2.95,-        -1.8-      ],-      "size_mm": [-        0.85,-        0.2-      ],-      "rot": 0.0-    },-    {-      "number": "3",-      "shape": "roundrect",-      "center_mm": [-        -2.95,-        -1.4-      ],-      "size_mm": [-        0.85,-        0.2-      ],-      "rot": 0.0-    },-    {-      "number": "4",-      "shape": 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bluenrg-345mc.kicad_sym+1−1
@@ -156,7 +156,7 @@       (name "VDDSD" (effects (font (size 1.27 1.27))))       (number "36" (effects (font (size 1.27 1.27))))     )-    (pin power_in line (at 17.78 -5.08 180) (length 5.08)+    (pin passive line (at 17.78 -5.08 180) (length 5.08)       (name "VLXSD" (effects (font (size 1.27 1.27))))       (number "35" (effects (font (size 1.27 1.27))))     )
bluenrg-345mc.lbr+13−4
@@ -50,7 +50,7 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description></description>+<description>STMicroelectronics RF Transceiver ICs, QFN-48-EP(6x6). Pinout reviewed by a person against the datasheet</description> <packages> <package name="QFN-48-1EP_6x6mm_P0.4mm_EP4.2x4.2mm">   <description>QFN-48-1EP, 6 x 6 mm, 0.4 mm pitch</description>@@ -129,6 +129,7 @@ </packages> <symbols> <symbol name="BLUENRG-345MC">+  <description>STMicroelectronics RF Transceiver ICs, QFN-48-EP(6x6). Pinout reviewed by a person against the datasheet</description>   <wire x1="-12.7" y1="30.48" x2="12.7" y2="30.48" width="0.254" layer="94"/>   <wire x1="12.7" y1="30.48" x2="12.7" y2="-33.02" width="0.254" layer="94"/>   <wire x1="12.7" y1="-33.02" x2="-12.7" y2="-33.02" width="0.254" layer="94"/>@@ -172,7 +173,7 @@   <pin name="RSTN" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>   <pin name="VDD3" x="17.78" y="0" length="middle" direction="pwr" rot="R180"/>   <pin name="VDDSD" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>-  <pin name="VLXSD" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+  <pin name="VLXSD" x="17.78" y="-5.08" length="middle" direction="pas" rot="R180"/>   <pin name="VSSSD" x="17.78" y="-7.62" length="middle" direction="pwr" rot="R180"/>   <pin name="NC" x="17.78" y="-10.16" length="middle" direction="nc" rot="R180"/>   <pin name="VFBSD" x="17.78" y="-12.7" length="middle" direction="out" rot="R180"/>@@ -187,7 +188,7 @@ </symbols> <devicesets> <deviceset name="BLUENRG-345MC" prefix="U">-  <description></description>+  <description>STMicroelectronics RF Transceiver ICs, QFN-48-EP(6x6). Pinout reviewed by a person against the datasheet</description>   <gates>     <gate name="G$1" symbol="BLUENRG-345MC" x="0" y="0"/>   </gates>@@ -243,7 +244,15 @@         <connect gate="G$1" pin="VDD4" pad="26"/>         <connect gate="G$1" pin="OSCIN" pad="25"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="BLUENRG-345MC" constant="no"/>+          <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+          <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590361576147886080" constant="no"/>+          <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/bluenrg-345mc" constant="no"/>+          <attribute name="LCSC_PN" value="C3606690" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>
bluenrg-345mc.step+1−1
@@ -1,7 +1,7 @@ ISO-10303-21; HEADER; FILE_DESCRIPTION(('Open CASCADE Model'),'2;1');-FILE_NAME('Open CASCADE Shape Model','2026-10-21T17:46:15',('Author'),(+FILE_NAME('Open CASCADE Shape Model','2026-10-21T18:30:37',('Author'),(     'Open CASCADE'),'Open CASCADE STEP processor 7.9','Open CASCADE 7.9'   ,'Unknown'); FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }'));
package.json+46−46
@@ -1,6 +1,6 @@ {   "slug": "bluenrg-345mc",-  "version": "0.1.0",+  "version": "0.1.1",   "type": "component",   "description": "STMicroelectronics RF Transceiver ICs, QFN-48-EP(6x6). Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.",   "tags": [@@ -52,7 +52,7 @@       "lcsc": "C3606690"     },     "distributor_check": {-      "checked_at": "2026-10-21T17:49:59Z",+      "checked_at": "2026-10-21T18:34:30Z",       "source": "Component Ocean /api/assign-pns",       "digikey": {         "pn": null,@@ -68,121 +68,121 @@         "number": "1",         "name": "PB3",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions USART_CTS, LPUART_TX, TIM1_CH4, ADC input ADC_VINP0, and wakeup."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions USART_CTS, LPUART_TX, TIM1_CH4, additional functions ADC_VINP0 and wakeup."       },       {         "number": "2",         "name": "PB2",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions USART_RTS_DE, PDM_DATA, TIM1_CH3, ADC input ADC_VINM0, and wakeup."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions USART_RTS_DE, PDM_DATA, TIM1_CH3, additional functions ADC_VINM0 and wakeup."       },       {         "number": "3",         "name": "PB1",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions SPI1_NSS, PDM_CLK, TIM1_ETR, ADC input ADC_VINP1, and wakeup."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions SPI1_NSS, PDM_CLK, TIM1_ETR, additional functions ADC_VINP1 and wakeup."       },       {         "number": "4",         "name": "PB0",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions USART_RX, LPUART_RTS_DE, TIM1_CH2N, ADC input ADC_VINM1, and wakeup."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions USART_RX, LPUART_RTS_DE, TIM1_CH2N, additional functions ADC_VINM1 and wakeup."       },       {         "number": "5",         "name": "PA15",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions I2C2_SMBA, SPI1_MOSI, TIM1_BKIN2, ADC input ADC_VINP2, and wakeup."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions I2C2_SMBA, SPI1_MOSI, TIM1_BKIN2, additional functions ADC_VINP2 and wakeup."       },       {         "number": "6",         "name": "PA14",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions I2C2_SDA, SPI1_MISO, TIM1_BKIN, ADC input ADC_VINM2, and wakeup."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions I2C2_SDA, SPI1_MISO, TIM1_BKIN, additional functions ADC_VINM2 and wakeup."       },       {         "number": "7",         "name": "PA13",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions I2C2_SCL, SPI1_SCK, SPI2_MISO, TIM1_ETR, I2S2_MISO, ADC input ADC_VINP3, and wakeup."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions I2C2_SCL, SPI1_SCK, SPI2_MISO, TIM1_ETR, I2S2_MISO, additional functions ADC_VINP3 and wakeup."       },       {         "number": "8",         "name": "PA12",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions I2C1_SMBA, SPI1_NSS, SPI2_MOSI, TIM1_CH1, I2S2_SD, ADC input ADC_VINM3, and wakeup."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions I2C1_SMBA, SPI1_NSS, SPI2_MOSI, TIM1_CH1, I2S2_SD, additional functions ADC_VINM3 and wakeup."       },       {         "number": "9",         "name": "PA11",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions MCO, SPI1_NSS, RX_SEQUENCE, SPI3_MOSI, TIM1_CH6, I2S3_SD, with wakeup, GPIO in DEEPSTOP and RTC_OUT."+        "description": "5 V tolerant FT I/O; alternate functions MCO, SPI1_NSS, RX_SEQUENCE, SPI3_MOSI, TIM1_CH6, I2S3_SD; additional functions wakeup, GPIO in DEEPSTOP and RTC_OUT."       },       {         "number": "10",         "name": "PA10",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions LCO, SPI1_MISO, TX_SEQUENCE, SPI3_MCK, TIM1_CH5, I2S3_MCK, with BOOT, wakeup and GPIO in DEEPSTOP."+        "description": "5 V tolerant FT I/O; alternate functions LCO, SPI1_MISO, TX_SEQUENCE, SPI3_MCK, TIM1_CH5, I2S3_MCK; additional functions BOOT, wakeup, GPIO in DEEPSTOP and LCO."       },       {         "number": "11",         "name": "PA9",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions USART_TX, SPI1_SCK, RTC_OUT, SPI3_NSS, TIM1_CH4, I2S3_WS, with wakeup, GPIO in DEEPSTOP and LCO."+        "description": "5 V tolerant FT I/O; alternate functions USART_TX, SPI1_SCK, RTC_OUT, SPI3_NSS, TIM1_CH4, I2S3_WS; additional functions wakeup, GPIO in DEEPSTOP and LCO."       },       {         "number": "12",         "name": "PA8",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions USART_RX, SPI1_MOSI, RX_SEQUENCE, SPI3_MISO, TIM1_CH3, I2S3_MISO, with wakeup, GPIO in DEEPSTOP and RTC_OUT."+        "description": "5 V tolerant FT I/O; alternate functions USART_RX, SPI1_MOSI, RX_SEQUENCE, SPI3_MISO, TIM1_CH3, I2S3_MISO; additional functions wakeup, GPIO in DEEPSTOP and RTC_OUT."       },       {         "number": "13",         "name": "PA0",         "type": "bidirectional",-        "description": "I/O with FT_f structure (I/O, Fm+ capable, 5 V tolerant), alternate functions I2C1_SCL, USART_CTS, SPI2_MCK, TIM1_CH3, I2S2_MCK, with wakeup."+        "description": "5 V tolerant FT_f I/O (Fm+ capable); alternate functions I2C1_SCL, USART_CTS, SPI2_MCK, TIM1_CH3, I2S2_MCK; additional function wakeup."       },       {         "number": "14",         "name": "PA1",         "type": "bidirectional",-        "description": "I/O with FT_f structure (I/O, Fm+ capable, 5 V tolerant), alternate functions I2C1_SDA, SPI2_MISO, USART_TX, TIM1_CH4, I2S2_MISO, with wakeup."+        "description": "5 V tolerant FT_f I/O (Fm+ capable); alternate functions I2C1_SDA, SPI2_MISO, USART_TX, TIM1_CH4, I2S2_MISO; additional function wakeup."       },       {         "number": "15",         "name": "PA2",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate function SWDIO (serial wire debug data) plus USART_CK, TIM_BKIN, SPI3_MCK, TIM1_CH5, I2S3_MCK, with wakeup."+        "description": "5 V tolerant FT I/O; alternate functions SWDIO, USART_CK, TIM_BKIN, SPI3_MCK, TIM1_CH5, I2S3_MCK; additional function wakeup."       },       {         "number": "16",         "name": "PA3",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate function SWCLK (serial wire debug clock) plus USART_RTS_DE, TIM_BKIN2, SPI3_SCK, TIM1_CH6, I2S3_SCK, with wakeup."+        "description": "5 V tolerant FT I/O; alternate functions SWCLK, USART_RTS_DE, TIM_BKIN2, SPI3_SCK, TIM1_CH6, I2S3_SCK; additional function wakeup."       },       {         "number": "17",         "name": "PA4",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions LCO, SPI2_NSS, LPUART_TX, TIM1_CH1, I2S2_WS, with wakeup, GPIO in DEEPSTOP and LCO."+        "description": "5 V tolerant FT I/O; alternate functions LCO, SPI2_NSS, LPUART_TX, TIM1_CH1, I2S2_WS; additional functions wakeup, GPIO in DEEPSTOP and LCO."       },       {         "number": "18",         "name": "PA5",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions MCO, SPI2_SCK, LPUART_RX, TIM1_CH2, I2S2_SCK, with wakeup, GPIO in DEEPSTOP and LCO."+        "description": "5 V tolerant FT I/O; alternate functions MCO, SPI2_SCK, LPUART_RX, TIM1_CH2, I2S2_SCK; additional functions wakeup, GPIO in DEEPSTOP and LCO."       },       {         "number": "19",         "name": "PA6",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions LPUART_CTS, SPI2_MOSI, SPI2_NSS, TIM1_CH1, I2S2_SD, I2S2_WS, with wakeup, GPIO in DEEPSTOP and LCO."+        "description": "5 V tolerant FT I/O; alternate functions LPUART_CTS, SPI2_MOSI, SPI2_NSS, TIM1_CH1, I2S2_SD, I2S2_WS; additional functions wakeup, GPIO in DEEPSTOP and LCO."       },       {         "number": "20",         "name": "PA7",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions LPUART_RTS_DE, SPI2_MISO, SPI2_SCK, TIM1_CH2, I2S2_MISO, I2S2_SCK, with wakeup, GPIO in DEEPSTOP and RTC_OUT."+        "description": "5 V tolerant FT I/O; alternate functions LPUART_RTS_DE, SPI2_MISO, SPI2_SCK, TIM1_CH2, I2S2_MISO, I2S2_SCK; additional functions wakeup, GPIO in DEEPSTOP and RTC_OUT."       },       {         "number": "21",@@ -206,13 +206,13 @@         "number": "24",         "name": "OSCOUT",         "type": "bidirectional",-        "description": "RF I/O used for the 32 MHz crystal connection."+        "description": "RF pin for the 32 MHz crystal connection."       },       {         "number": "25",         "name": "OSCIN",         "type": "bidirectional",-        "description": "RF I/O used for the 32 MHz crystal connection."+        "description": "RF pin for the 32 MHz crystal connection."       },       {         "number": "26",@@ -224,55 +224,55 @@         "number": "27",         "name": "PB15",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions I2C1_SMBA, TX_SEQUENCE, MCO, TIM1_CH4N, TIM1_CH6, USART_TX."+        "description": "5 V tolerant FT I/O; alternate functions I2C1_SMBA, TX_SEQUENCE, MCO, TIM1_CH4N, TIM1_CH6, USART_TX."       },       {         "number": "28",         "name": "PB14",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions SPI1_MOSI, I2C2_SDA, TIM1_ETR, TIM1_CH3N, TIM1_CH5, USART_RX, with additional function VIN_PVD."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions SPI1_MOSI, I2C2_SDA, TIM1_ETR, TIM1_CH3N, TIM1_CH5, USART_RX; additional function VIN_PVD."       },       {         "number": "29",         "name": "PB13",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions SPI1_MISO, I2C2_SCL, PDM_CLK, TIM1_BKIN2, TIM1_CH4, with additional function SXTAL1 (low-speed crystal)."+        "description": "5 V tolerant FT I/O; alternate functions SPI1_MISO, I2C2_SCL, PDM_CLK, TIM1_BKIN2, TIM1_CH4; additional function SXTAL1."       },       {         "number": "30",         "name": "PB12",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions SPI1_SCK, LCO, PDM_DATA, TIM1_BKIN, TIM1_CH3, with additional function SXTAL0 (low-speed crystal)."+        "description": "5 V tolerant FT I/O; alternate functions SPI1_SCK, LCO, PDM_DATA, TIM1_BKIN, TIM1_CH3; additional function SXTAL0."       },       {         "number": "31",         "name": "VCAP",         "type": "power_out",-        "description": "1.2 V digital core supply node."+        "description": "1.2 V digital core supply pin."       },       {         "number": "32",         "name": "VFBSD",         "type": "power_out",-        "description": "SMPS output (feedback node of the embedded step-down converter)."+        "description": "SMPS output pin."       },       {         "number": "33",         "name": "NC",         "type": "unconnected",-        "description": "Listed as NC in the pin table; no function is given."+        "description": "Not connected; the datasheet gives no function for this pin."       },       {         "number": "34",         "name": "VSSSD",         "type": "power_in",-        "description": "SMPS ground."+        "description": "SMPS ground pin."       },       {         "number": "35",         "name": "VLXSD",-        "type": "power_in",-        "description": "SMPS input/output node of the embedded step-down converter."+        "type": "passive",+        "description": "SMPS input/output pin."       },       {         "number": "36",@@ -302,61 +302,61 @@         "number": "40",         "name": "VDDA",         "type": "power_out",-        "description": "1.2 V analog ADC core supply node."+        "description": "1.2 V analog ADC core supply pin."       },       {         "number": "41",         "name": "PB11",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions SPI1_SCK, SPI2_NSS, I2C1_SCL, TIM1_CH1, TIM1_CH4N, I2S2_WS, with wakeup."+        "description": "5 V tolerant FT I/O; alternate functions SPI1_SCK, SPI2_NSS, I2C1_SCL, TIM1_CH1, TIM1_CH4N, I2S2_WS; additional function wakeup."       },       {         "number": "42",         "name": "PB10",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions SPI1_NSS, SPI2_SCK, I2C1_SDA, TIM1_CH2, TIM1_CH3N, I2S2_SCK, with wakeup."+        "description": "5 V tolerant FT I/O; alternate functions SPI1_NSS, SPI2_SCK, I2C1_SDA, TIM1_CH2, TIM1_CH3N, I2S2_SCK; additional function wakeup."       },       {         "number": "43",         "name": "PB9",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions USART_TX, LPUART_CTS, SPI2_MCK, TIM1_CH1N, TIM1_CH2N, I2S2_MCK, with wakeup."+        "description": "5 V tolerant FT I/O; alternate functions USART_TX, LPUART_CTS, SPI2_MCK, TIM1_CH1N, TIM1_CH2N, I2S2_MCK; additional function wakeup."       },       {         "number": "44",         "name": "PB8",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions USART_CK, LPUART_RX, TIM1_CH4, TIM1_CH1N, with wakeup."+        "description": "5 V tolerant FT I/O; alternate functions USART_CK, LPUART_RX, TIM1_CH4, TIM1_CH1N; additional function wakeup."       },       {         "number": "45",         "name": "PB7",         "type": "bidirectional",-        "description": "I/O with FT_f structure (I/O, Fm+ capable, 5 V tolerant), alternate functions I2C2_SDA, SPI2_SCK, LPUART_RX, TIM1_CH2, I2S2_SCK, with wakeup."+        "description": "5 V tolerant FT_f I/O (Fm+ capable); alternate functions I2C2_SDA, SPI2_SCK, LPUART_RX, TIM1_CH2, I2S2_SCK; additional function wakeup."       },       {         "number": "46",         "name": "PB6",         "type": "bidirectional",-        "description": "I/O with FT_f structure (I/O, Fm+ capable, 5 V tolerant), alternate functions I2C2_SCL, SPI2_NSS, LPUART_TX, TIM1_CH1, I2S2_WS, with wakeup."+        "description": "5 V tolerant FT_f I/O (Fm+ capable); alternate functions I2C2_SCL, SPI2_NSS, LPUART_TX, TIM1_CH1, I2S2_WS; additional function wakeup."       },       {         "number": "47",         "name": "PB5",         "type": "bidirectional",-        "description": "I/O with TT structure (3.6 V tolerant only, not 5 V tolerant), alternate functions LPUART_RX, SPI2_MOSI, PDM_CLK, I2S2_SD, with additional function PGA_VBIAS_MIC and wakeup."+        "description": "3.6 V tolerant TT I/O, not 5 V tolerant; alternate functions LPUART_RX, SPI2_MOSI, PDM_CLK, I2S2_SD; additional functions PGA_VBIAS_MIC and wakeup."       },       {         "number": "48",         "name": "PB4",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions LPUART_TX, SPI2_MISO, PDM_DATA, I2S2_MISO, with additional function PGA_VIN and wakeup."+        "description": "5 V tolerant FT I/O; alternate functions LPUART_TX, SPI2_MISO, PDM_DATA, I2S2_MISO; additional functions PGA_VIN and wakeup."       },       {         "number": "EP",         "name": "GND",         "type": "power_in",-        "description": "Exposed pad, ground; the datasheet lists it as the Exposed pad with GND function."+        "description": "Exposed pad; ground."       }     ],     "provenance": {@@ -395,7 +395,7 @@         "zmin_mm": 0.0,         "centre_offset_mm": 0.0,         "footprint_binding": "identity",-        "sha256": "de6592a924947c0d1975d91d193617ee171ccb5dc7c90741b6614c5a683d0b40",+        "sha256": "19f13525df0bc029c547236fe4408611192506a361857e53b969fe8ba5e34523",         "checked": "2026-10-21",         "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"       },@@ -414,7 +414,7 @@         "zmin_mm": 0.0,         "centre_offset_mm": 0.0,         "footprint_binding": "identity",-        "sha256": "2a31c2cfa8eed119381f99882492cd163f16d3b263302ae5936759ab2733e29b",+        "sha256": "9c08db9a22bee3f4381ddb8aac9599269792f9e90e973e0b32dab8eb01a31c19",         "checked": "2026-10-21",         "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"       }
page.json+49−49
@@ -4,7 +4,7 @@   "slug": "bluenrg-345mc",   "title": "BLUENRG-345MC",   "brief": "STMicroelectronics RF Transceiver ICs, QFN-48-EP(6x6). Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.",-  "version": "0.1.0",+  "version": "0.1.1",   "license": "CC-BY-SA-4.0",   "tags": [     "component",@@ -34,7 +34,7 @@       "lcsc": "C3606690"     },     "distributor_check": {-      "checked_at": "2026-10-21T17:49:59Z",+      "checked_at": "2026-10-21T18:34:30Z",       "source": "Component Ocean /api/assign-pns",       "digikey": {         "pn": null,@@ -50,121 +50,121 @@         "number": "1",         "name": "PB3",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions USART_CTS, LPUART_TX, TIM1_CH4, ADC input ADC_VINP0, and wakeup."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions USART_CTS, LPUART_TX, TIM1_CH4, additional functions ADC_VINP0 and wakeup."       },       {         "number": "2",         "name": "PB2",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions USART_RTS_DE, PDM_DATA, TIM1_CH3, ADC input ADC_VINM0, and wakeup."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions USART_RTS_DE, PDM_DATA, TIM1_CH3, additional functions ADC_VINM0 and wakeup."       },       {         "number": "3",         "name": "PB1",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions SPI1_NSS, PDM_CLK, TIM1_ETR, ADC input ADC_VINP1, and wakeup."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions SPI1_NSS, PDM_CLK, TIM1_ETR, additional functions ADC_VINP1 and wakeup."       },       {         "number": "4",         "name": "PB0",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions USART_RX, LPUART_RTS_DE, TIM1_CH2N, ADC input ADC_VINM1, and wakeup."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions USART_RX, LPUART_RTS_DE, TIM1_CH2N, additional functions ADC_VINM1 and wakeup."       },       {         "number": "5",         "name": "PA15",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions I2C2_SMBA, SPI1_MOSI, TIM1_BKIN2, ADC input ADC_VINP2, and wakeup."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions I2C2_SMBA, SPI1_MOSI, TIM1_BKIN2, additional functions ADC_VINP2 and wakeup."       },       {         "number": "6",         "name": "PA14",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions I2C2_SDA, SPI1_MISO, TIM1_BKIN, ADC input ADC_VINM2, and wakeup."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions I2C2_SDA, SPI1_MISO, TIM1_BKIN, additional functions ADC_VINM2 and wakeup."       },       {         "number": "7",         "name": "PA13",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions I2C2_SCL, SPI1_SCK, SPI2_MISO, TIM1_ETR, I2S2_MISO, ADC input ADC_VINP3, and wakeup."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions I2C2_SCL, SPI1_SCK, SPI2_MISO, TIM1_ETR, I2S2_MISO, additional functions ADC_VINP3 and wakeup."       },       {         "number": "8",         "name": "PA12",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions I2C1_SMBA, SPI1_NSS, SPI2_MOSI, TIM1_CH1, I2S2_SD, ADC input ADC_VINM3, and wakeup."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions I2C1_SMBA, SPI1_NSS, SPI2_MOSI, TIM1_CH1, I2S2_SD, additional functions ADC_VINM3 and wakeup."       },       {         "number": "9",         "name": "PA11",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions MCO, SPI1_NSS, RX_SEQUENCE, SPI3_MOSI, TIM1_CH6, I2S3_SD, with wakeup, GPIO in DEEPSTOP and RTC_OUT."+        "description": "5 V tolerant FT I/O; alternate functions MCO, SPI1_NSS, RX_SEQUENCE, SPI3_MOSI, TIM1_CH6, I2S3_SD; additional functions wakeup, GPIO in DEEPSTOP and RTC_OUT."       },       {         "number": "10",         "name": "PA10",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions LCO, SPI1_MISO, TX_SEQUENCE, SPI3_MCK, TIM1_CH5, I2S3_MCK, with BOOT, wakeup and GPIO in DEEPSTOP."+        "description": "5 V tolerant FT I/O; alternate functions LCO, SPI1_MISO, TX_SEQUENCE, SPI3_MCK, TIM1_CH5, I2S3_MCK; additional functions BOOT, wakeup, GPIO in DEEPSTOP and LCO."       },       {         "number": "11",         "name": "PA9",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions USART_TX, SPI1_SCK, RTC_OUT, SPI3_NSS, TIM1_CH4, I2S3_WS, with wakeup, GPIO in DEEPSTOP and LCO."+        "description": "5 V tolerant FT I/O; alternate functions USART_TX, SPI1_SCK, RTC_OUT, SPI3_NSS, TIM1_CH4, I2S3_WS; additional functions wakeup, GPIO in DEEPSTOP and LCO."       },       {         "number": "12",         "name": "PA8",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions USART_RX, SPI1_MOSI, RX_SEQUENCE, SPI3_MISO, TIM1_CH3, I2S3_MISO, with wakeup, GPIO in DEEPSTOP and RTC_OUT."+        "description": "5 V tolerant FT I/O; alternate functions USART_RX, SPI1_MOSI, RX_SEQUENCE, SPI3_MISO, TIM1_CH3, I2S3_MISO; additional functions wakeup, GPIO in DEEPSTOP and RTC_OUT."       },       {         "number": "13",         "name": "PA0",         "type": "bidirectional",-        "description": "I/O with FT_f structure (I/O, Fm+ capable, 5 V tolerant), alternate functions I2C1_SCL, USART_CTS, SPI2_MCK, TIM1_CH3, I2S2_MCK, with wakeup."+        "description": "5 V tolerant FT_f I/O (Fm+ capable); alternate functions I2C1_SCL, USART_CTS, SPI2_MCK, TIM1_CH3, I2S2_MCK; additional function wakeup."       },       {         "number": "14",         "name": "PA1",         "type": "bidirectional",-        "description": "I/O with FT_f structure (I/O, Fm+ capable, 5 V tolerant), alternate functions I2C1_SDA, SPI2_MISO, USART_TX, TIM1_CH4, I2S2_MISO, with wakeup."+        "description": "5 V tolerant FT_f I/O (Fm+ capable); alternate functions I2C1_SDA, SPI2_MISO, USART_TX, TIM1_CH4, I2S2_MISO; additional function wakeup."       },       {         "number": "15",         "name": "PA2",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate function SWDIO (serial wire debug data) plus USART_CK, TIM_BKIN, SPI3_MCK, TIM1_CH5, I2S3_MCK, with wakeup."+        "description": "5 V tolerant FT I/O; alternate functions SWDIO, USART_CK, TIM_BKIN, SPI3_MCK, TIM1_CH5, I2S3_MCK; additional function wakeup."       },       {         "number": "16",         "name": "PA3",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate function SWCLK (serial wire debug clock) plus USART_RTS_DE, TIM_BKIN2, SPI3_SCK, TIM1_CH6, I2S3_SCK, with wakeup."+        "description": "5 V tolerant FT I/O; alternate functions SWCLK, USART_RTS_DE, TIM_BKIN2, SPI3_SCK, TIM1_CH6, I2S3_SCK; additional function wakeup."       },       {         "number": "17",         "name": "PA4",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions LCO, SPI2_NSS, LPUART_TX, TIM1_CH1, I2S2_WS, with wakeup, GPIO in DEEPSTOP and LCO."+        "description": "5 V tolerant FT I/O; alternate functions LCO, SPI2_NSS, LPUART_TX, TIM1_CH1, I2S2_WS; additional functions wakeup, GPIO in DEEPSTOP and LCO."       },       {         "number": "18",         "name": "PA5",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions MCO, SPI2_SCK, LPUART_RX, TIM1_CH2, I2S2_SCK, with wakeup, GPIO in DEEPSTOP and LCO."+        "description": "5 V tolerant FT I/O; alternate functions MCO, SPI2_SCK, LPUART_RX, TIM1_CH2, I2S2_SCK; additional functions wakeup, GPIO in DEEPSTOP and LCO."       },       {         "number": "19",         "name": "PA6",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions LPUART_CTS, SPI2_MOSI, SPI2_NSS, TIM1_CH1, I2S2_SD, I2S2_WS, with wakeup, GPIO in DEEPSTOP and LCO."+        "description": "5 V tolerant FT I/O; alternate functions LPUART_CTS, SPI2_MOSI, SPI2_NSS, TIM1_CH1, I2S2_SD, I2S2_WS; additional functions wakeup, GPIO in DEEPSTOP and LCO."       },       {         "number": "20",         "name": "PA7",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions LPUART_RTS_DE, SPI2_MISO, SPI2_SCK, TIM1_CH2, I2S2_MISO, I2S2_SCK, with wakeup, GPIO in DEEPSTOP and RTC_OUT."+        "description": "5 V tolerant FT I/O; alternate functions LPUART_RTS_DE, SPI2_MISO, SPI2_SCK, TIM1_CH2, I2S2_MISO, I2S2_SCK; additional functions wakeup, GPIO in DEEPSTOP and RTC_OUT."       },       {         "number": "21",@@ -188,13 +188,13 @@         "number": "24",         "name": "OSCOUT",         "type": "bidirectional",-        "description": "RF I/O used for the 32 MHz crystal connection."+        "description": "RF pin for the 32 MHz crystal connection."       },       {         "number": "25",         "name": "OSCIN",         "type": "bidirectional",-        "description": "RF I/O used for the 32 MHz crystal connection."+        "description": "RF pin for the 32 MHz crystal connection."       },       {         "number": "26",@@ -206,55 +206,55 @@         "number": "27",         "name": "PB15",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions I2C1_SMBA, TX_SEQUENCE, MCO, TIM1_CH4N, TIM1_CH6, USART_TX."+        "description": "5 V tolerant FT I/O; alternate functions I2C1_SMBA, TX_SEQUENCE, MCO, TIM1_CH4N, TIM1_CH6, USART_TX."       },       {         "number": "28",         "name": "PB14",         "type": "bidirectional",-        "description": "I/O with FT_a structure (5 V tolerant), alternate functions SPI1_MOSI, I2C2_SDA, TIM1_ETR, TIM1_CH3N, TIM1_CH5, USART_RX, with additional function VIN_PVD."+        "description": "5 V tolerant FT_a I/O with analog switch function; alternate functions SPI1_MOSI, I2C2_SDA, TIM1_ETR, TIM1_CH3N, TIM1_CH5, USART_RX; additional function VIN_PVD."       },       {         "number": "29",         "name": "PB13",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions SPI1_MISO, I2C2_SCL, PDM_CLK, TIM1_BKIN2, TIM1_CH4, with additional function SXTAL1 (low-speed crystal)."+        "description": "5 V tolerant FT I/O; alternate functions SPI1_MISO, I2C2_SCL, PDM_CLK, TIM1_BKIN2, TIM1_CH4; additional function SXTAL1."       },       {         "number": "30",         "name": "PB12",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions SPI1_SCK, LCO, PDM_DATA, TIM1_BKIN, TIM1_CH3, with additional function SXTAL0 (low-speed crystal)."+        "description": "5 V tolerant FT I/O; alternate functions SPI1_SCK, LCO, PDM_DATA, TIM1_BKIN, TIM1_CH3; additional function SXTAL0."       },       {         "number": "31",         "name": "VCAP",         "type": "power_out",-        "description": "1.2 V digital core supply node."+        "description": "1.2 V digital core supply pin."       },       {         "number": "32",         "name": "VFBSD",         "type": "power_out",-        "description": "SMPS output (feedback node of the embedded step-down converter)."+        "description": "SMPS output pin."       },       {         "number": "33",         "name": "NC",         "type": "unconnected",-        "description": "Listed as NC in the pin table; no function is given."+        "description": "Not connected; the datasheet gives no function for this pin."       },       {         "number": "34",         "name": "VSSSD",         "type": "power_in",-        "description": "SMPS ground."+        "description": "SMPS ground pin."       },       {         "number": "35",         "name": "VLXSD",-        "type": "power_in",-        "description": "SMPS input/output node of the embedded step-down converter."+        "type": "passive",+        "description": "SMPS input/output pin."       },       {         "number": "36",@@ -284,61 +284,61 @@         "number": "40",         "name": "VDDA",         "type": "power_out",-        "description": "1.2 V analog ADC core supply node."+        "description": "1.2 V analog ADC core supply pin."       },       {         "number": "41",         "name": "PB11",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions SPI1_SCK, SPI2_NSS, I2C1_SCL, TIM1_CH1, TIM1_CH4N, I2S2_WS, with wakeup."+        "description": "5 V tolerant FT I/O; alternate functions SPI1_SCK, SPI2_NSS, I2C1_SCL, TIM1_CH1, TIM1_CH4N, I2S2_WS; additional function wakeup."       },       {         "number": "42",         "name": "PB10",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions SPI1_NSS, SPI2_SCK, I2C1_SDA, TIM1_CH2, TIM1_CH3N, I2S2_SCK, with wakeup."+        "description": "5 V tolerant FT I/O; alternate functions SPI1_NSS, SPI2_SCK, I2C1_SDA, TIM1_CH2, TIM1_CH3N, I2S2_SCK; additional function wakeup."       },       {         "number": "43",         "name": "PB9",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions USART_TX, LPUART_CTS, SPI2_MCK, TIM1_CH1N, TIM1_CH2N, I2S2_MCK, with wakeup."+        "description": "5 V tolerant FT I/O; alternate functions USART_TX, LPUART_CTS, SPI2_MCK, TIM1_CH1N, TIM1_CH2N, I2S2_MCK; additional function wakeup."       },       {         "number": "44",         "name": "PB8",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions USART_CK, LPUART_RX, TIM1_CH4, TIM1_CH1N, with wakeup."+        "description": "5 V tolerant FT I/O; alternate functions USART_CK, LPUART_RX, TIM1_CH4, TIM1_CH1N; additional function wakeup."       },       {         "number": "45",         "name": "PB7",         "type": "bidirectional",-        "description": "I/O with FT_f structure (I/O, Fm+ capable, 5 V tolerant), alternate functions I2C2_SDA, SPI2_SCK, LPUART_RX, TIM1_CH2, I2S2_SCK, with wakeup."+        "description": "5 V tolerant FT_f I/O (Fm+ capable); alternate functions I2C2_SDA, SPI2_SCK, LPUART_RX, TIM1_CH2, I2S2_SCK; additional function wakeup."       },       {         "number": "46",         "name": "PB6",         "type": "bidirectional",-        "description": "I/O with FT_f structure (I/O, Fm+ capable, 5 V tolerant), alternate functions I2C2_SCL, SPI2_NSS, LPUART_TX, TIM1_CH1, I2S2_WS, with wakeup."+        "description": "5 V tolerant FT_f I/O (Fm+ capable); alternate functions I2C2_SCL, SPI2_NSS, LPUART_TX, TIM1_CH1, I2S2_WS; additional function wakeup."       },       {         "number": "47",         "name": "PB5",         "type": "bidirectional",-        "description": "I/O with TT structure (3.6 V tolerant only, not 5 V tolerant), alternate functions LPUART_RX, SPI2_MOSI, PDM_CLK, I2S2_SD, with additional function PGA_VBIAS_MIC and wakeup."+        "description": "3.6 V tolerant TT I/O, not 5 V tolerant; alternate functions LPUART_RX, SPI2_MOSI, PDM_CLK, I2S2_SD; additional functions PGA_VBIAS_MIC and wakeup."       },       {         "number": "48",         "name": "PB4",         "type": "bidirectional",-        "description": "I/O with FT structure (5 V tolerant), alternate functions LPUART_TX, SPI2_MISO, PDM_DATA, I2S2_MISO, with additional function PGA_VIN and wakeup."+        "description": "5 V tolerant FT I/O; alternate functions LPUART_TX, SPI2_MISO, PDM_DATA, I2S2_MISO; additional functions PGA_VIN and wakeup."       },       {         "number": "EP",         "name": "GND",         "type": "power_in",-        "description": "Exposed pad, ground; the datasheet lists it as the Exposed pad with GND function."+        "description": "Exposed pad; ground."       }     ],     "provenance": {@@ -377,7 +377,7 @@         "zmin_mm": 0,         "centre_offset_mm": 0,         "footprint_binding": "identity",-        "sha256": "de6592a924947c0d1975d91d193617ee171ccb5dc7c90741b6614c5a683d0b40",+        "sha256": "19f13525df0bc029c547236fe4408611192506a361857e53b969fe8ba5e34523",         "checked": "2026-10-21",         "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"       },@@ -396,7 +396,7 @@         "zmin_mm": 0,         "centre_offset_mm": 0,         "footprint_binding": "identity",-        "sha256": "2a31c2cfa8eed119381f99882492cd163f16d3b263302ae5936759ab2733e29b",+        "sha256": "9c08db9a22bee3f4381ddb8aac9599269792f9e90e973e0b32dab8eb01a31c19",         "checked": "2026-10-21",         "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"       }@@ -1174,7 +1174,7 @@     "bluenrg-345mc-hero.overlay.json",     "bluenrg-345mc-etched.glb"   ],-  "visibility": {-    "public": true-  }+  "visibility": "public",+  "description": "STMicroelectronics RF Transceiver ICs, QFN-48-EP(6x6). Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.",+  "org": "adom" }\ No newline at end of file