component
BL0972
Public Made by Adomby adom
BL Shanghai Belling Energy Metering, TSSOP-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+189−8@@ -1,13 +1,199 @@ {+ "schema_version": 1,+ "type": "component", "slug": "bl0972",+ "title": "BL0972",+ "brief": "BL Shanghai Belling Energy Metering, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "BL Shanghai Belling Energy Metering, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "data acquisition", "bl0972" ],+ "component": {+ "mpn": "BL0972",+ "manufacturer": "BL Shanghai Belling",+ "package": "TSSOP-20",+ "pin_count": 20,+ "category": "Data Acquisition",+ "subcategory": "Energy Metering",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589040352136712192",+ "parts": {+ "symbol": "bl0972.kicad_sym",+ "footprint": "bl0972.kicad_mod",+ "model_3d": "bl0972.glb",+ "model_3d_step": "bl0972.step",+ "lbr": "bl0972.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "VP",+ "type": "input",+ "description": "Voltage-channel differential input, positive side. Max differential input +/-0.6 V at 1x PGA gain (approx +/-37.5 mV at 16x). Referenced to VN."+ },+ {+ "number": "2",+ "name": "RST",+ "type": "input",+ "description": "Active-low chip reset. Held high through a pull-up in reference designs; asserted low to reinitialize the IC."+ },+ {+ "number": "3",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground return. Should be routed separately from the current-sense return per PCB layout guidance."+ },+ {+ "number": "4",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground return for the SPI and control logic."+ },+ {+ "number": "5",+ "name": "CS",+ "type": "input",+ "description": "SPI chip-select input, active low. Frames each SPI transaction to the host MCU."+ },+ {+ "number": "6",+ "name": "DOUT",+ "type": "output",+ "description": "SPI serial data out (MISO). Drives register read data back to the host."+ },+ {+ "number": "7",+ "name": "DIN",+ "type": "input",+ "description": "SPI serial data in (MOSI). Receives command/address/data words from the host."+ },+ {+ "number": "8",+ "name": "SCLK",+ "type": "input",+ "description": "SPI serial clock input. Full timing specification is in the standalone datasheet (BL0972_Datasheet_Vx.x.pdf)."+ },+ {+ "number": "9",+ "name": "IRQ",+ "type": "output",+ "description": "Interrupt/status output. Reference designs drive a status LED via a 1.2 k series resistor."+ },+ {+ "number": "10",+ "name": "VPP",+ "type": "passive",+ "description": "VPP factory/test pin. Brought out to a header in reference designs; not used in normal operation."+ },+ {+ "number": "11",+ "name": "CF",+ "type": "output",+ "description": "Energy calibration pulse output. Configurable through MODE3 register; frequency scales with active power (CF_CNT counter). Reference boards route it to an LED indicator."+ },+ {+ "number": "12",+ "name": "MF",+ "type": "output",+ "description": "Multi-function output, default function is overcurrent alarm (fast-RMS threshold). Alternate roles are selected through the MODE3 register."+ },+ {+ "number": "13",+ "name": "DVDD18",+ "type": "power_out",+ "description": "Internal 1.8 V digital LDO output. Requires an external decoupling capacitor (0.1 uF) placed close to the pin; do NOT drive externally."+ },+ {+ "number": "14",+ "name": "VDD",+ "type": "power_in",+ "description": "Main 3.3 V supply input. Decoupled with a local 0.1 uF placed close to the pin per the PCB layout guidance."+ },+ {+ "number": "15",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground return (second AGND pin)."+ },+ {+ "number": "16",+ "name": "IN",+ "type": "input",+ "description": "Current-channel differential input, negative side. Paired with IP; supports 1/2/8/16x PGA (16x gives approx +/-37.5 mV max differential)."+ },+ {+ "number": "17",+ "name": "IP",+ "type": "input",+ "description": "Current-channel differential input, positive side. Route with IN as a tight differential pair to the shunt or CT burden network."+ },+ {+ "number": "18",+ "name": "VT",+ "type": "passive",+ "description": "Auxiliary analog pin (VT). In the AC reference design it is tied via an STV312-class device to GND; used for internal biasing/test."+ },+ {+ "number": "19",+ "name": "Vref",+ "type": "power_out",+ "description": "Internal 1.097 V ADC voltage reference output. Requires an external 0.1 uF decoupling capacitor to AGND close to the pin."+ },+ {+ "number": "20",+ "name": "VN",+ "type": "input",+ "description": "Voltage-channel differential input, negative side. Paired with VP."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589040352136712192",+ "pages": 10,+ "sha256": "69d699ccb472717e",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "BL Shanghai Belling",+ "Package": "TSSOP-20",+ "Category": "Data Acquisition",+ "Pins": "20"+ }+ },+ "variants": [],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "bl0972"+ ],+ "discovery_pitch": "BL0972 (BL Shanghai Belling) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +211,5 @@ "docs/bl0972-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }