biss0001m

@@ -33,5 +33,126 @@   "author": {     "name": "Ray",     "email": "[email protected]"+  },+  "component": {+    "mpn": "BISS0001M",+    "manufacturer": "HGSEMI",+    "package": "SOP-16",+    "pin_count": 16,+    "category": "Human Body Sensing Sensor",+    "parts": {+      "symbol": "biss0001m.kicad_sym",+      "footprint": "biss0001m.kicad_mod",+      "model_3d": "biss0001m-etched.glb",+      "model_3d_plain": "biss0001m.glb",+      "model_3d_step": "biss0001m-etched.step",+      "model_3d_step_plain": "biss0001m.step",+      "lbr": "biss0001m.lbr"+    },+    "pins": [+      {+        "number": "1",+        "name": "A",+        "type": "input",+        "description": "Trigger mode control input. A=1 enables retriggerable mode (Vs may re-trigger Vo during Tx, extending it); A=0 selects non-retriggerable mode (Vs is ignored during Tx). VIH >= 3.5 V, VIL <= 1.5 V at VDD=5V."+      },+      {+        "number": "2",+        "name": "VO",+        "type": "output",+        "description": "Control signal output. Driven high on the rising edge of the internal Vs trigger signal (valid trigger) and held high for the delay time Tx; otherwise low. VOH >= 4 V, VOL <= 0.4 V at VDD=5V."+      },+      {+        "number": "3",+        "name": "RR1",+        "type": "passive",+        "description": "Output-delay-time (Tx) adjust pin. External resistor R1 to RC1 sets Tx together with C1 per Tx ≈ 67025·R1·C1 (seconds, with R in Ω and C in F)."+      },+      {+        "number": "4",+        "name": "RC1",+        "type": "passive",+        "description": "Output-delay-time (Tx) adjust pin. External capacitor C1 to VSS combined with R1 on RR1 sets Tx ≈ 67025·R1·C1."+      },+      {+        "number": "5",+        "name": "RC2",+        "type": "passive",+        "description": "Trigger-blocking-time (Ti) adjust pin. External capacitor C2 to VSS with R2 on RR2 sets Ti ≈ 60·R2·C2 (seconds, with R in Ω and C in F). During Ti any change of Vs is ignored."+      },+      {+        "number": "6",+        "name": "RR2",+        "type": "passive",+        "description": "Trigger-blocking-time (Ti) adjust pin. External resistor R2 to RC2 sets Ti together with C2 per Ti ≈ 60·R2·C2."+      },+      {+        "number": "7",+        "name": "VSS",+        "type": "power_in",+        "description": "Negative supply / ground reference. Typically 0 V."+      },+      {+        "number": "8",+        "name": "VRF/RESET",+        "type": "input",+        "description": "Reference voltage and reset input. Normally tied to VDD for normal operation; pulling to 0 resets the internal timers."+      },+      {+        "number": "9",+        "name": "VC",+        "type": "input",+        "description": "Trigger-inhibit input. Vc < VR (≈0.2·VDD) inhibits triggering; Vc > VR enables triggering. Often driven from an LDR (e.g. CdS RGS) so ambient light disables the switch. VIH >= 1.1 V, VIL <= 0.9 V at VDD=5V."+      },+      {+        "number": "10",+        "name": "IB",+        "type": "passive",+        "description": "Op-amp bias-current setting pin. Connect through RB (~1 MΩ) to VSS to program the internal op-amps' bias current."+      },+      {+        "number": "11",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive supply. Operating range 3.0-5.0 V (absolute max +6 V). Typical IDD 50 µA at 3 V, 100 µA at 5 V (no-load)."+      },+      {+        "number": "12",+        "name": "2OUT",+        "type": "output",+        "description": "Second-stage op-amp (OP2) output. Feeds the internal bi-directional amplitude discriminator (window comparator COP1/COP2, thresholds VH ≈ 0.7·VDD, VL ≈ 0.3·VDD)."+      },+      {+        "number": "13",+        "name": "2IN-",+        "type": "input",+        "description": "Second-stage op-amp (OP2) inverting input. AC-coupled from OP2's non-inverting input (biased to VM ≈ 0.5·VDD internally); external RC network sets the second-stage gain."+      },+      {+        "number": "14",+        "name": "1IN+",+        "type": "input",+        "description": "First-stage op-amp (OP1) non-inverting input. High-input-impedance signal input for the PIR sensor front-end preamplifier."+      },+      {+        "number": "15",+        "name": "1IN-",+        "type": "input",+        "description": "First-stage op-amp (OP1) inverting input. External feedback network from 1OUT sets the first-stage gain."+      },+      {+        "number": "16",+        "name": "1OUT",+        "type": "output",+        "description": "First-stage op-amp (OP1) output. AC-coupled through an external capacitor to the OP2 inverting input (2IN-). Open-loop gain typ. 60 dB, output swing 0.75-4.25 V at VDD=5V."+      }+    ],+    "provenance": {+      "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }   }-}\ No newline at end of file+}