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biss0001: factory component page (tier=lcsc)

Ray ·d275a3ce6e · ·parent 027985e
1 file changed +164−8
page.json+164−8
@@ -1,13 +1,174 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "biss0001",+  "title": "BISS0001",+  "brief": "GR Human Body Sensing Sensor, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "GR Human Body Sensing Sensor, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "sensor",     "biss0001"   ],+  "component": {+    "mpn": "BISS0001",+    "manufacturer": "GR",+    "package": "SOP-16",+    "pin_count": 16,+    "category": "Sensor",+    "subcategory": "Human Body Sensing Sensor",+    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2309150925_GR-BISS0001_C18164474.pdf",+    "parts": {+      "symbol": "biss0001.kicad_sym",+      "footprint": "biss0001.kicad_mod",+      "model_3d": "biss0001.glb",+      "model_3d_step": "biss0001.step",+      "lbr": "biss0001.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "A",+        "type": "input",+        "description": "Retrigger mode select. A=1 enables retriggerable mode (Vo can be re-extended by new Vs edges); A=0 selects non-retriggerable mode (Vs edges ignored during Tx). VAH >= 3.5 V, VAL <= 1.5 V at VDD=5 V."+      },+      {+        "number": "2",+        "name": "VO",+        "type": "output",+        "description": "Control signal output. Driven high by a rising edge of the internal Vs comparator output; remains high for the output-delay time Tx, then returns low. VOH >= 4 V, VOL <= 0.4 V at VDD=5 V."+      },+      {+        "number": "3",+        "name": "RR1",+        "type": "passive",+        "description": "Output-delay-time (Tx) adjustment. External resistor R1 to VDD together with capacitor C1 on RC1 sets Tx ~= 67025 * R1 * C1."+      },+      {+        "number": "4",+        "name": "RC1",+        "type": "passive",+        "description": "Output-delay-time (Tx) adjustment. External capacitor C1 to VSS together with resistor R1 on RR1 sets Tx ~= 67025 * R1 * C1."+      },+      {+        "number": "5",+        "name": "RC2",+        "type": "passive",+        "description": "Inhibit (blocking) time (Ti) adjustment. External capacitor C2 to VSS together with resistor R2 on RR2 sets Ti ~= 60 * R2 * C2."+      },+      {+        "number": "6",+        "name": "RR2",+        "type": "passive",+        "description": "Inhibit (blocking) time (Ti) adjustment. External resistor R2 together with capacitor C2 on RC2 sets Ti ~= 60 * R2 * C2."+      },+      {+        "number": "7",+        "name": "VSS",+        "type": "power_in",+        "description": "Negative supply / ground. Normally tied to 0 V."+      },+      {+        "number": "8",+        "name": "VRF/RESET",+        "type": "input",+        "description": "Reference-voltage and reset input. Normally tied to VDD for normal operation; pulling to 0 resets the internal timers."+      },+      {+        "number": "9",+        "name": "VC",+        "type": "input",+        "description": "Trigger-inhibit input. Compared against internal VR ~= 0.2*VDD: when VC<VR triggering is blocked; when VC>VR triggering is enabled. Typically driven from an ambient-light (CdS) sensor. VRH >= 1.1 V, VRL <= 0.9 V at VDD=5 V."+      },+      {+        "number": "10",+        "name": "IB",+        "type": "passive",+        "description": "Op-amp bias-current setting. External resistor RB (~1 M-ohm) to VSS sets the internal op-amp bias current."+      },+      {+        "number": "11",+        "name": "VDD",+        "type": "power_in",+        "description": "Positive supply, 3.0-5.0 V operating range (absolute max +6 V). Typical IDD 50 uA at 3 V (loaded) / 100 uA at 5 V (no load)."+      },+      {+        "number": "12",+        "name": "2OUT",+        "type": "output",+        "description": "Second-stage op-amp (OP2) output. Feeds the internal bidirectional window comparator (COP1/COP2, VH ~= 0.7*VDD, VL ~= 0.3*VDD)."+      },+      {+        "number": "13",+        "name": "2IN-",+        "type": "input",+        "description": "Second-stage op-amp (OP2) inverting input. Non-inverting input is internally biased to VM ~= 0.5*VDD."+      },+      {+        "number": "14",+        "name": "1IN+",+        "type": "input",+        "description": "First-stage op-amp (OP1) non-inverting input. High-input-impedance CMOS input for direct connection to PIR sensor."+      },+      {+        "number": "15",+        "name": "1IN-",+        "type": "input",+        "description": "First-stage op-amp (OP1) inverting input."+      },+      {+        "number": "16",+        "name": "1OUT",+        "type": "output",+        "description": "First-stage op-amp (OP1) output. Open-loop gain Avo >= 60 dB; output swing VYH >= 4.25 V, VYL <= 0.75 V at VDD=5 V."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2309150925_GR-BISS0001_C18164474.pdf",+        "pages": 6,+        "sha256": "2062bc65634236c9",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "GR",+      "Package": "SOP-16",+      "Category": "Sensor",+      "Pins": "16"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "biss0001"+  ],+  "discovery_pitch": "BISS0001 (GR) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +186,5 @@     "docs/biss0001-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file