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bdr6300: factory component page (tier=lcsc)

Ray ·ae0ed81087 ·2mo ago ·parent f075316
1 file changed +165−8
page.json+165−8
@@ -1,13 +1,175 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "bdr6300",+  "title": "BDR6300",+  "brief": "Bardeen Micro Brushless DC (BLDC) Motor Driver, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Bardeen Micro Brushless DC (BLDC) Motor Driver, SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "motor driver ics",     "bdr6300"   ],+  "component": {+    "mpn": "BDR6300",+    "manufacturer": "Bardeen Micro",+    "package": "SOP-16",+    "pin_count": 16,+    "category": "Motor Driver ICs",+    "subcategory": "Brushless DC (BLDC) Motor Driver",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590905739844272128",+    "parts": {+      "symbol": "bdr6300.kicad_sym",+      "footprint": "bdr6300.kicad_mod",+      "model_3d": "bdr6300.glb",+      "model_3d_step": "bdr6300.step",+      "lbr": "bdr6300.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "VDD",+        "type": "power_in",+        "description": "Main power supply input, also feeds the internal LDO. Operating range 12V to 30V. May be externally tied to VCC."+      },+      {+        "number": "2",+        "name": "VCC",+        "type": "power_in",+        "description": "PMOS driver stage supply. Recommended operating range 8V to 30V (typ 24V). May be externally tied to VDD."+      },+      {+        "number": "3",+        "name": "P3_OUT",+        "type": "output",+        "description": "Phase-3 PMOS gate drive output. Inverted with respect to P3_IN (high when P3_IN floats or is low, low when P3_IN is high). Drives directly to PMOS gate."+      },+      {+        "number": "4",+        "name": "N3_OUT",+        "type": "output",+        "description": "Phase-3 NMOS gate drive output. Follows N3_IN (low when floating or low, high when high)."+      },+      {+        "number": "5",+        "name": "P2_OUT",+        "type": "output",+        "description": "Phase-2 PMOS gate drive output. Inverted with respect to P2_IN. Drives PMOS gate directly."+      },+      {+        "number": "6",+        "name": "N2_OUT",+        "type": "output",+        "description": "Phase-2 NMOS gate drive output. Follows N2_IN."+      },+      {+        "number": "7",+        "name": "P1_OUT",+        "type": "output",+        "description": "Phase-1 PMOS gate drive output. Inverted with respect to P1_IN. Drives PMOS gate directly."+      },+      {+        "number": "8",+        "name": "N1_OUT",+        "type": "output",+        "description": "Phase-1 NMOS gate drive output. Follows N1_IN."+      },+      {+        "number": "9",+        "name": "N1_IN",+        "type": "input",+        "description": "Phase-1 NMOS logic input. Internal 16k pull-down to GND - floats low. Drive high to turn on NMOS."+      },+      {+        "number": "10",+        "name": "P1_IN",+        "type": "input",+        "description": "Phase-1 PMOS logic input. Internal 8k pull-up to VCC - floats high (PMOS off). Drive low to turn on PMOS."+      },+      {+        "number": "11",+        "name": "N2_IN",+        "type": "input",+        "description": "Phase-2 NMOS logic input. Internal 16k pull-down. Drive high to enable NMOS gate output."+      },+      {+        "number": "12",+        "name": "P2_IN",+        "type": "input",+        "description": "Phase-2 PMOS logic input. Internal 8k pull-up. Input current ~1.1mA at 5V drive. Drive low to enable PMOS gate output."+      },+      {+        "number": "13",+        "name": "N3_IN",+        "type": "input",+        "description": "Phase-3 NMOS logic input. Internal 16k pull-down. Drive high to enable NMOS gate output."+      },+      {+        "number": "14",+        "name": "P3_IN",+        "type": "input",+        "description": "Phase-3 PMOS logic input. Internal 8k pull-up. Drive low to enable PMOS gate output."+      },+      {+        "number": "15",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference for the IC."+      },+      {+        "number": "16",+        "name": "+5V",+        "type": "power_out",+        "description": "LDO regulated output, 4.8V/5.0V/5.3V (min/typ/max). Supplies up to 60mA when VDD<24V. Bypass with a ceramic capacitor to GND."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590905739844272128",+        "pages": 6,+        "sha256": "97f9c9c9d046c8b0",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Bardeen Micro",+      "Package": "SOP-16",+      "Category": "Motor Driver ICs",+      "Pins": "16"+    }+  },+  "variants": [],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "bdr6300"+  ],+  "discovery_pitch": "BDR6300 (Bardeen Micro) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +187,5 @@     "docs/bdr6300-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file