BD9E303EFJ-LBE2

@@ -0,0 +1,50 @@+# BD9E303EFJ-LBE2++**ROHM** · DC-DC Converters · HTSOP-8-EP++BD9E303EFJ-LBE2 from ROHM, in a HTSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BOOT | passive | Bootstrap capacitor terminal for the high-side MOSFET gate driver. Connect a 0.1 µF bootstrap capacitor between BOOT and SW; the voltage on this capacitor is the gate drive voltage of the high-side MOSFET. Absolute max VBOOT: -0.3 to +45 V referenced to GND (ΔVBOOT: -0.3 to +7 V). |+| 2 | VIN | power_in | Power supply input for the switching regulator and internal control circuit. Operating range 7.0 V to 36 V (abs max 40 V). A 10 µF and 0.1 µF ceramic input capacitor combination is recommended. |+| 3 | EN | input | Enable input. Low level (≤0.8 V) forces the device into shutdown; high level (≥2.5 V) enables the device. Must be terminated (do not leave floating). Absolute max 40 V; typical IEN = 4.2 µA at VEN = 3 V. |+| 4 | AGND | power_in | Analog ground for the internal control circuitry. Should be connected to the system ground plane (star-connected to PGND at the exposed pad). |+| 5 | FB | input | Inverting input of the gm error amplifier and feedback sense node. Reference voltage VFB = 1.000 V typ (0.990-1.010 V at TJ=25°C). Set the output voltage via an external resistor divider from VOUT to FB. Abs max -0.3 to +7 V. |+| 6 | COMP | output | Error amplifier output and PWM comparator input. Connect external RC phase-compensation components (typical 15 kΩ + 6800 pF to AGND). Abs max -0.3 to +7 V. |+| 7 | PGND | power_in | Power ground for the switching output stage (return for the low-side MOSFET). Must be tied to AGND at the exposed pad through a low-impedance path. |+| 8 | SW | power_out | Switch node - source of the high-side MOSFET and drain of the low-side MOSFET. Connect the 0.1 µF bootstrap capacitor between SW and BOOT, and the external inductor (e.g. 10 µH) from SW to VOUT. Abs max -0.5 V to VIN+0.3 V. |+| 9 | E-Pad | power_in | Exposed thermal pad on the package bottom. Connect to the internal PCB ground plane using multiple thermal vias for heat dissipation; electrically tied to ground. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | ROHM |+| Package | HTSOP-8-EP |+| Category | PMIC |+| Pins | 9 |++## Ordering variants++Same part, different packaging or reel option.++- `BD9E303EFJ-LBE2`++## CAD (KiCad official)++- Symbol: `BD9E303EFJ-LBE2`+- Footprint: `Package_SO:HTSOP-8-1EP_3.9x4.9mm_P1.27mm_EP2.4x3.2mm`+- 3D model: HTSOP-8-EP (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [ROHM datasheet](docs/bd9e303efj-lbe2-datasheet.pdf) (31 pp, sha256 `559a764e9a5064b1`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/bd9e303efj-lbe2-datasheet.pdf)

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